From Chessprogramming wiki
Jump to: navigation, search

Home * Hardware * Z80

Die of a Z80A [1]

an 8-bit microprocessor designed by Zilog founder and CEO Federico Faggin, first released by Zilog in July 1976. It was designed to be binary upward compatible with the Intel 8080 so that most notably the CP/M operating system would run unmodified, but offered an enhanced instruction set, two separate register banks plus two additional 16-bit index registers IX and IY.


Z80 arch.svg

The 8080 compatible registers AF, BC, DE, HL are duplicated as two separate banks in the Z80 [2]


Like 8080, Z80 is a little-endian machine, concerning the byte-order of 16-bit words in memory.

Z80 Chess Programs

with Assembly listings:

See also

Selected Publications

External Links


  1. An original Zilog Z80 Z0840004PSC with a datecode of 9012. Die size 3545x3350µm., source: Zilog Z80 Z0840004PSC : weekend die-shot : ZeptoBars, Zilog Z80 from Wikipedia
  2. Z80 architecture, by Appaloosa, October 17, 2007, Zilog Z80 from Wikipedia
  3. 1K ZX81 Chess Z80 Assembly listing © Copyright David Horne 1983
  4. Sargon Z80 assembly listing by Dan and Kathe Spracklen, hosted by Andre Adrian
  5. pdf download link by Rodnay Zaks

Up one Level