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Created page with "'''Home * Hardware * SPARC''' FILE:Sun_SuperSPARC_II_die.JPG|border|right|thumb| SuperSPARC II <ref>[https://commons.wikimedia.org/wiki/File:Sun_SuperSPAR..."
'''[[Main Page|Home]] * [[Hardware]] * SPARC'''
[[FILE:Sun_SuperSPARC_II_die.JPG|border|right|thumb| SuperSPARC II <ref>[https://commons.wikimedia.org/wiki/File:Sun_SuperSPARC_II_die.JPG Die shot of Sun SuperSPARC II] (STP1021APGA-75) microprocessor by [https://commons.wikimedia.org/wiki/User:Birdman86 Pauli Rautakorpi], October 28, 2013, [https://creativecommons.org/licenses/by/3.0/deed.en CC BY 3.0], [https://en.wikipedia.org/wiki/Wikimedia_Commons Wikimedia Commons]</ref> ]]
'''SPARC''', ('''S'''calable '''P'''rocessor '''Arc'''hitecture)<br/>
a [https://en.wikipedia.org/wiki/Reduced_Instruction_Set_Computer RISC] architecture developed by [[Sun Microsystems]] introduced in 1986 as 32-bit and early 90s as 64-bit [[SMP]] architecture. Implementations of the original 32-bit SPARC '''V7''' architecture were initially designed and used in Sun's [[Sun#4|Sun-4]] workstation and server systems, replacing their earlier [[Sun#3|Sun-3]] systems based on the [[Motorola]] [[68020]] series of processors. <span id="9"></span>Later '''UltraSPARC''' processors implementing the SPARC '''V9''' architecture were used in [[SMP]] and [[NUMA|ccNUMA]] servers and designed for 64-bit operations. [https://en.wikipedia.org/wiki/Oracle_Corporation Oracle] continued the development of the SPARC V9 architecture after its [https://en.wikipedia.org/wiki/Sun_acquisition_by_Oracle acquisition of Sun], as recently with the Sparc M7 <ref>[http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/sparc-t7-m7-server-architecture-2702877.pdf Oracle’s SPARC T7 and SPARC M7 Server Architecture] (pdf)</ref> <ref>[https://blogs.oracle.com/rajadurai/entry/sparc_m7_chip_32_cores SPARC M7 Chip - 32 cores - Mind Blowing performance (Angelo's Soapbox)]</ref>.
=Architecture=
The SPARC processor usually contains as many as 160 general purpose registers, with 32 of them immediately visible to software, that is 8 global register g0-g7 and 3x8 as [https://en.wikipedia.org/wiki/Register_window register window] at function entry and exit moved up and down the register [[Stack|stack]]. Each window has 8 local registers and shares 8 registers with each of the adjacent windows to pass parameters or return values <ref>[https://people.cs.clemson.edu/~mark/subroutines/sparc.html Sketch of SPARC Subroutines] by [https://people.cs.clemson.edu/~mark/homepage.html Mark Smotherman]</ref>. The [[Endianness|endianness]] of the 32-bit SPARC '''V8''' architecture is purely [[Big-endian|big-endian]], while the 64-bit SPARC V9 architecture uses big-endian instructions, but can access data in either big-endian or [[Little-endian|little-endian]] order, chosen either at the application instruction ([https://en.wikipedia.org/wiki/Load/store_architecture load/store]) level or at the [[Memory|memory page]] level (via an [https://en.wikipedia.org/wiki/Memory_management_unit MMU] setting) <ref>[https://en.wikipedia.org/wiki/SPARC SPARC from Wikipedia]</ref>. In 1995, the V9 UltraSPARC first implemented the [[SIMD and SWAR Techniques|SIMD]] [https://en.wikipedia.org/wiki/Visual_Instruction_Set Visual Instruction Set] (VSI), introduced in 1994.
=Chess Programs=
SPARC [[Unix]] workstations were popular systems to run computer chess programs in the 90s, such as [[Ferret]] and [[DarkThought]]. [[Kasparov Sparc]] by [[Saitek]] was the last chess computer programmed by [[Kathe Spracklen|Kathe]] and [[Dan Spracklen]] <ref>[http://www.computerhistory.org/trustee/gardner-hendrie Gardner Hendrie] ('''2005'''). ''Oral History of Kathe and Dan Spracklen''. [http://archive.computerhistory.org/projects/chess/related_materials/oral-history/spacklen.oral_history.2005.102630821/spracklen.oral_history_transcript.2005.102630821.pdf pdf] from [[The Computer History Museum]]</ref>. The parallel [[Massachusetts Institute of Technology|MIT]] chess programs [[StarTech]] and [[Star Socrates|*Socrates]] ran on [[University of Illinois at Urbana-Champaign#NCSA|NCSA's]] [[Connection Machine#CM5|CM-5]] with 512 SuperSPARC cores <ref>[https://www.top500.org/system/167057 CM-5/512 | TOP500 Supercomputer Sites]</ref>.
=See also=
* [[Connection Machine#CM5|Connection Machine CM-5]]
* [[Kasparov Sparc]]
* [[SPARCstation]]
* [[Sun#4|Sun-4]]
=External Links=
* [https://en.wikipedia.org/wiki/SPARC SPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/MB86900 MB86900 from Wikipedia]
* [https://en.wikipedia.org/wiki/MicroSPARC MicroSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/SuperSPARC SuperSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/HyperSPARC hyperSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC64 SPARC64 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC64_VI SPARC64 VI from Wikipedia]
* [http://www.cpu-collection.de/?tn=1&l0=cl&l1=SPARC Scalable Processor ARChitecture] from [http://www.cpu-collection.de/?tn=1 cpu-collection.de]
==UltraSPARC ==
* <span id="Ultra"></span>[https://en.wikipedia.org/wiki/UltraSPARC UltraSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_II UltraSPARC II from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_III UltraSPARC III from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_IV UltraSPARC IV from Wikipedia]
==T/M-Series==
* [https://en.wikipedia.org/wiki/SPARC_T-Series SPARC T-Series from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_T1 UltraSPARC T1 from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_T2 UltraSPARC T2 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC_T3 SPARC T3 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC_T4 SPARC T4 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC_T5 SPARC T5 from Wikipedia]
* [https://blogs.oracle.com/rajadurai/entry/sparc_m7_chip_32_cores SPARC M7 Chip - 32 cores - Mind Blowing performance (Angelo's Soapbox)]
* [http://www.nextplatform.com/2015/10/28/inside-oracles-new-sparc-m7-systems/ Inside Oracle's New Sparc M7 Systems] by [http://www.nextplatform.com/author/tpmn/ Timothy Prickett Morgan], [http://www.nextplatform.com/ The Next Platform], October 28, 2015
==OpenSPARC==
* [https://en.wikipedia.org/wiki/OpenSPARC OpenSPARC from Wikipedia]
* [http://www.oracle.com/technetwork/systems/opensparc/index.html Overview of OpenSPARC Resources]
==[[Assembly]]==
* [https://docs.oracle.com/cd/E19457-01/801-6649/801-6649.pdf SPARC Assembly Language Reference Manual] (pdf)
* [https://en.wikibooks.org/wiki/SPARC_Assembly SPARC Assembly - Wikibooks]
* [https://people.cs.clemson.edu/~mark/sparc_assembly.html SPARC Assembly Language] by [https://people.cs.clemson.edu/~mark/homepage.html Mark Smotherman], [https://en.wikipedia.org/wiki/Clemson_University Clemson University]
==SPARCstation==
* <span id="1"></span>[https://en.wikipedia.org/wiki/SPARCstation_1 SPARCstation 1 from Wikipedia]
* <span id="2"></span>[https://en.wikipedia.org/wiki/SPARCstation_2 SPARCstation 2 from Wikipedia]
* <span id="10"></span>[https://en.wikipedia.org/wiki/SPARCstation_10 SPARCstation 10 from Wikipedia]
* <span id="20"></span>[https://en.wikipedia.org/wiki/SPARCstation_20 SPARCstation 20 from Wikipedia]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[Category:Die]]
[[FILE:Sun_SuperSPARC_II_die.JPG|border|right|thumb| SuperSPARC II <ref>[https://commons.wikimedia.org/wiki/File:Sun_SuperSPARC_II_die.JPG Die shot of Sun SuperSPARC II] (STP1021APGA-75) microprocessor by [https://commons.wikimedia.org/wiki/User:Birdman86 Pauli Rautakorpi], October 28, 2013, [https://creativecommons.org/licenses/by/3.0/deed.en CC BY 3.0], [https://en.wikipedia.org/wiki/Wikimedia_Commons Wikimedia Commons]</ref> ]]
'''SPARC''', ('''S'''calable '''P'''rocessor '''Arc'''hitecture)<br/>
a [https://en.wikipedia.org/wiki/Reduced_Instruction_Set_Computer RISC] architecture developed by [[Sun Microsystems]] introduced in 1986 as 32-bit and early 90s as 64-bit [[SMP]] architecture. Implementations of the original 32-bit SPARC '''V7''' architecture were initially designed and used in Sun's [[Sun#4|Sun-4]] workstation and server systems, replacing their earlier [[Sun#3|Sun-3]] systems based on the [[Motorola]] [[68020]] series of processors. <span id="9"></span>Later '''UltraSPARC''' processors implementing the SPARC '''V9''' architecture were used in [[SMP]] and [[NUMA|ccNUMA]] servers and designed for 64-bit operations. [https://en.wikipedia.org/wiki/Oracle_Corporation Oracle] continued the development of the SPARC V9 architecture after its [https://en.wikipedia.org/wiki/Sun_acquisition_by_Oracle acquisition of Sun], as recently with the Sparc M7 <ref>[http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/sparc-t7-m7-server-architecture-2702877.pdf Oracle’s SPARC T7 and SPARC M7 Server Architecture] (pdf)</ref> <ref>[https://blogs.oracle.com/rajadurai/entry/sparc_m7_chip_32_cores SPARC M7 Chip - 32 cores - Mind Blowing performance (Angelo's Soapbox)]</ref>.
=Architecture=
The SPARC processor usually contains as many as 160 general purpose registers, with 32 of them immediately visible to software, that is 8 global register g0-g7 and 3x8 as [https://en.wikipedia.org/wiki/Register_window register window] at function entry and exit moved up and down the register [[Stack|stack]]. Each window has 8 local registers and shares 8 registers with each of the adjacent windows to pass parameters or return values <ref>[https://people.cs.clemson.edu/~mark/subroutines/sparc.html Sketch of SPARC Subroutines] by [https://people.cs.clemson.edu/~mark/homepage.html Mark Smotherman]</ref>. The [[Endianness|endianness]] of the 32-bit SPARC '''V8''' architecture is purely [[Big-endian|big-endian]], while the 64-bit SPARC V9 architecture uses big-endian instructions, but can access data in either big-endian or [[Little-endian|little-endian]] order, chosen either at the application instruction ([https://en.wikipedia.org/wiki/Load/store_architecture load/store]) level or at the [[Memory|memory page]] level (via an [https://en.wikipedia.org/wiki/Memory_management_unit MMU] setting) <ref>[https://en.wikipedia.org/wiki/SPARC SPARC from Wikipedia]</ref>. In 1995, the V9 UltraSPARC first implemented the [[SIMD and SWAR Techniques|SIMD]] [https://en.wikipedia.org/wiki/Visual_Instruction_Set Visual Instruction Set] (VSI), introduced in 1994.
=Chess Programs=
SPARC [[Unix]] workstations were popular systems to run computer chess programs in the 90s, such as [[Ferret]] and [[DarkThought]]. [[Kasparov Sparc]] by [[Saitek]] was the last chess computer programmed by [[Kathe Spracklen|Kathe]] and [[Dan Spracklen]] <ref>[http://www.computerhistory.org/trustee/gardner-hendrie Gardner Hendrie] ('''2005'''). ''Oral History of Kathe and Dan Spracklen''. [http://archive.computerhistory.org/projects/chess/related_materials/oral-history/spacklen.oral_history.2005.102630821/spracklen.oral_history_transcript.2005.102630821.pdf pdf] from [[The Computer History Museum]]</ref>. The parallel [[Massachusetts Institute of Technology|MIT]] chess programs [[StarTech]] and [[Star Socrates|*Socrates]] ran on [[University of Illinois at Urbana-Champaign#NCSA|NCSA's]] [[Connection Machine#CM5|CM-5]] with 512 SuperSPARC cores <ref>[https://www.top500.org/system/167057 CM-5/512 | TOP500 Supercomputer Sites]</ref>.
=See also=
* [[Connection Machine#CM5|Connection Machine CM-5]]
* [[Kasparov Sparc]]
* [[SPARCstation]]
* [[Sun#4|Sun-4]]
=External Links=
* [https://en.wikipedia.org/wiki/SPARC SPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/MB86900 MB86900 from Wikipedia]
* [https://en.wikipedia.org/wiki/MicroSPARC MicroSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/SuperSPARC SuperSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/HyperSPARC hyperSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC64 SPARC64 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC64_VI SPARC64 VI from Wikipedia]
* [http://www.cpu-collection.de/?tn=1&l0=cl&l1=SPARC Scalable Processor ARChitecture] from [http://www.cpu-collection.de/?tn=1 cpu-collection.de]
==UltraSPARC ==
* <span id="Ultra"></span>[https://en.wikipedia.org/wiki/UltraSPARC UltraSPARC from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_II UltraSPARC II from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_III UltraSPARC III from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_IV UltraSPARC IV from Wikipedia]
==T/M-Series==
* [https://en.wikipedia.org/wiki/SPARC_T-Series SPARC T-Series from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_T1 UltraSPARC T1 from Wikipedia]
* [https://en.wikipedia.org/wiki/UltraSPARC_T2 UltraSPARC T2 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC_T3 SPARC T3 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC_T4 SPARC T4 from Wikipedia]
* [https://en.wikipedia.org/wiki/SPARC_T5 SPARC T5 from Wikipedia]
* [https://blogs.oracle.com/rajadurai/entry/sparc_m7_chip_32_cores SPARC M7 Chip - 32 cores - Mind Blowing performance (Angelo's Soapbox)]
* [http://www.nextplatform.com/2015/10/28/inside-oracles-new-sparc-m7-systems/ Inside Oracle's New Sparc M7 Systems] by [http://www.nextplatform.com/author/tpmn/ Timothy Prickett Morgan], [http://www.nextplatform.com/ The Next Platform], October 28, 2015
==OpenSPARC==
* [https://en.wikipedia.org/wiki/OpenSPARC OpenSPARC from Wikipedia]
* [http://www.oracle.com/technetwork/systems/opensparc/index.html Overview of OpenSPARC Resources]
==[[Assembly]]==
* [https://docs.oracle.com/cd/E19457-01/801-6649/801-6649.pdf SPARC Assembly Language Reference Manual] (pdf)
* [https://en.wikibooks.org/wiki/SPARC_Assembly SPARC Assembly - Wikibooks]
* [https://people.cs.clemson.edu/~mark/sparc_assembly.html SPARC Assembly Language] by [https://people.cs.clemson.edu/~mark/homepage.html Mark Smotherman], [https://en.wikipedia.org/wiki/Clemson_University Clemson University]
==SPARCstation==
* <span id="1"></span>[https://en.wikipedia.org/wiki/SPARCstation_1 SPARCstation 1 from Wikipedia]
* <span id="2"></span>[https://en.wikipedia.org/wiki/SPARCstation_2 SPARCstation 2 from Wikipedia]
* <span id="10"></span>[https://en.wikipedia.org/wiki/SPARCstation_10 SPARCstation 10 from Wikipedia]
* <span id="20"></span>[https://en.wikipedia.org/wiki/SPARCstation_20 SPARCstation 20 from Wikipedia]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[Category:Die]]
