Difference between revisions of "Talk:GPU"
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[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 11:46, 18 April 2021 (CEST) | [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 11:46, 18 April 2021 (CEST) | ||
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| + | == SIMD + Scalar Unit == | ||
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| + | According to AMD papers every SIMD unit has one scalar unit, Nvidia seems to have SFUs, special function units. | ||
| + | [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 11:47, 18 April 2021 (CEST) | ||
Revision as of 11:47, 18 April 2021
Nvidia architectures
Afaik Nvidia did never official mention SIMD in their papers as hardware architecture, with Tesla they only referred to as SIMT.
Nevertheless, my own conclusions are:
Tesla has 8 wide SIMD, executing a Warp of 32 threads over 4 cycles.
Fermi has 16 wide SIMD, executing a Warp of 32 threads over 2 cycles.
Kepler is somehow odd, not sure how the compute units are partitioned.
Maxwell and Pascal have 32 wide SIMD, executing a Warp of 32 threads over 1 cycle.
Volta and Turing seem to have 16 wide FPU SIMDs, but my own experiments show 32 wide VALU.
Smatovic (talk) 11:46, 18 April 2021 (CEST)
SIMD + Scalar Unit
According to AMD papers every SIMD unit has one scalar unit, Nvidia seems to have SFUs, special function units. Smatovic (talk) 11:47, 18 April 2021 (CEST)
