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→Nvidia architectures: new section
SIMT is not only about running multiple threads in a Warp resp. Wavefront, it is more about running multiple waves of Warps resp. Wavefronts on the same SIMD unit to hide memory latencies.
== Nvidia architectures ==
Afaik Nvidia did never official mention SIMD in their papers as hardware architecture, with Tesla they only referred to as SIMT.
Nevertheless, my own conclusions are:
Tesla has 8 wide SIMD, executing a Warp of 32 threads in 4 cycles.
Fermi has 16 wide SIMD, executing a Warp of 32 threads in 2 cycles.
Kepler is somehow odd, not sure how the compute units are partitioned.
Maxwell and Pascal have 32 wide SIMD, executing a Warp of 32 threads in 1 cycle.
Volta and Turing seem to have 16 wide FPU SIMDs, but my own experiments show 32 wide VALU.
