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According to AMD papers It seems every SIMD unit has one scalar uniton GPU architectures, Nvidia seems to have SFUs, executing things like branch-conditions or special function unitsfunctions the SIMD ALUs are not capable of.

[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 1120:4721, 18 22 April 2021 (CEST)

It is not documented in the white paperswhitepapers, but it seems that every discrete GPU has an embedded CPU controller (e.g. Nvidia Falcon) who (speculation) launches the kernels. [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 10:36, 22 April 2021 (CEST) == GPUs and Duncan's taxonomy ==It is not clear to me how the underlying hardware of GPU SIMD units of architectures with unified shader architecture is realized by different vendors, there is the concept of bit-sliced ALUs, there is the concept of pipelined vector processors, there is the concept of SIMD units with fix bit-width ALUs. The white papers from different vendors leave room for speculation, the different instruction throughputs for higher precision and lower precision too, what is left to the programmer is to do microbenchmarking and make conclusions on their own. https://en.wikipedia.org/wiki/Duncan%27s_taxonomy https://en.wikipedia.org/wiki/Flynn%27s_taxonomy [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 13:58, 16 December 2021 (CET) == CPW GPU article == A suggestion of mine, keep this GPU article as an generalized overview of GPUs, with incremental updates for different frameworks and architectures. GPUs and GPGPU is a moving target with different platforms offering new feature sets, better open own articles for things like GPGPU, SIMT, CUDA, ROCm, oneAPI, Metal or simply link to Wikipedia containing the newest specs and infos. [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 21:29, 27 April 2021 (CEST)

[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 11:48== GPGPU architectures ==Regarding GPGPU architectures or frameworks, 18 April 2021 (CEST)a link to the architecture white paper, instruction set architecture, programming guide, and link to Wikipedia with a list of the concrete models with specs would be nice, if available.

* TeraScale has VLIW design* GCN has 16 wide SIMDThis article does not cover legacy, pre 2007, GPGPU methods, how to use pixel, vertex, geometry, executing tessellation and compute shaders via OpenGL or DirectX for GPGPU. I can imagine it is possible to backport a neural network Lc0 backend to a Wavefront of 64 threads over 4 cycles.* RDNA certain DirextX/OpenGL API, but I doubt it has 32 wide SIMD, executing a Wavefront:32 over 1 cycle and Wavefront:64 over two cyclesreal contemporary relevance (running Lc0 on an SGI Indy or alike).

[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 1014:1609, 22 April 2021 14 November 2022 (CESTCET)