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Talk:GPU

439 bytes added, 21:29, 27 April 2021
CPW GPU article: new section
== AMD architectures ==
AMD has some kind of NDA in their newest whitepapers, so I will put this into the discussion section...my My own conclusions are:
* TeraScale has VLIW design.
* GCN has 16 wide SIMD, executing a Wavefront of 64 threads over 4 cycles.
* RDNA has 32 wide SIMD, executing a Wavefront:32 over 1 cycle and Wavefront:64 over two cycles.
== SIMD + Scalar Unit ==
According to AMD papers It seems every SIMD unit has one scalar uniton GPU architectures, Nvidia seems to have SFUs, executing things like branch-conditions or special function unitsfunctions the SIMD ALUs are not capable of.
[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 1120:4721, 18 22 April 2021 (CEST)
== embedded CPU controller ==
It is not documented in the white paperswhitepapers, but it seems that every discrete GPU has an embedded CPU controller (e.g. Nvidia Falcon) who (speculation) launches the kernels.
[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 1110:4836, 18 22 April 2021 (CEST) == CPW GPU article == A suggestion of mine, keep this GPU article as an generalized overview of GPUs, with incremental updates for different frameworks and architectures. GPUs and GPGPU is a moving target with different platforms offering new feature sets, better open own articles for things like GPGPU, SIMT, CUDA, ROCm, oneAPI, Metal or simply link to Wikipedia containing the newest specs and infos. [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 21:29, 27 April 2021 (CEST)
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