== AMD architectures ==
My own conclusions are:
* TeraScale has VLIW design.
* GCN has 16 wide SIMD, executing a Wavefront of 64 threads over 4 cycles.
* RDNA has 32 wide SIMD, executing a Wavefront:32 over 1 cycle and Wavefront:64 over two cycles.
[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 10:16, 22 April 2021 (CEST)
== Nvidia architectures ==
Nevertheless, my own conclusions are:
* Tesla has 8 wide SIMD, executing a Warp of 32 threads over 4 cycles. * Fermi has 16 wide SIMD, executing a Warp of 32 threads over 2 cycles.
Fermi has 16 wide SIMD* Kepler is somehow odd, executing a Warp of 32 threads over 2 cyclesnot sure how the compute units are partitioned.
Kepler is somehow odd* Maxwell and Pascal have 32 wide SIMD, not sure how the compute units are partitionedexecuting a Warp of 32 threads over 1 cycle.
Maxwell * Volta and Pascal Turing seem to have 32 16 wide SIMDFPU SIMDs, executing a Warp of but my own experiments show 32 threads over 1 cyclewide VALU.
Volta and Turing seem to have 16 wide FPU SIMDs[[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 10:17, but my own experiments show 32 wide VALU.22 April 2021 (CEST)
== SIMD + Scalar Unit ==
According to AMD papers It seems every SIMD unit has one scalar uniton GPU architectures, Nvidia seems to have one SFUexecuting things like branch-conditions or special functions the SIMD ALUs are not capable of. [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 20:21, special function unit22 April 2021 (CEST) == embedded CPU controller == It is not documented in the whitepapers, per SIMDbut it seems that every discrete GPU has an embedded CPU controller (e.g. Nvidia Falcon) who (speculation) launches the kernels. [[User:Smatovic|Smatovic]] ([[User talk:Smatovic|talk]]) 10:36, 22 April 2021 (CEST) == CPW GPU article ==
== embedded CPU controller ==A suggestion of mine, keep this GPU article as an generalized overview of GPUs, with incremental updates for different frameworks and architectures. GPUs and GPGPU is a moving target with different platforms offering new feature sets, better open own articles for things like GPGPU, SIMT, CUDA, ROCm, oneAPI, Metal or simply link to Wikipedia containing the newest specs and infos.
It is not documented in the white papers, but it seems that every discrete GPU has an embedded CPU controller [[User:Smatovic|Smatovic]] (e.g. Nvidia Falcon[[User talk:Smatovic|talk]]) who 21:29, 27 April 2021 (speculationCEST) launches the Kernels.
