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'''[[Main Page|Home]] * [[Hardware]] * Sequential Logic'''
[[FILE:sequential04.gif|border|right|thumb|link=http://web.mit.edu/6.111/www/f2005/tutprobs/sequential.html|Sequential circuit <ref>[http://web.mit.edu/6.111/www/f2005/tutprobs/sequential.html Sequential Logic]</ref> ]]
A '''Sequential Logic''' is a [https://en.wikipedia.org/wiki/Digital_electronics digital circuit] where one or more outputs are [https://en.wikipedia.org/wiki/Boolean_function boolean functions] of multiple inputs and the history of the outputs. In contrast to [[Combinatorial Logic|combinatorial logic]], a sequential logic requires [[Memory|memory]] to somehow feed the history of the outputs back to the inputs. Usually, for deterministic and reliable behavior considering internal [https://en.wikipedia.org/wiki/Latency_%28engineering%29 latencies] and [https://en.wikipedia.org/wiki/Propagation_delay propagation delays], a sequential logic is [https://en.wikipedia.org/wiki/Synchronous_logic synchronous], that is the memory only change their content on the edge of a [https://en.wikipedia.org/wiki/Clock_signal clock signal].
=Applications=
Sequential logic, that is [[Combinatorial Logic|combinatorial logic]] combined with [[Memory|memory]], is the base of [https://en.wikipedia.org/wiki/Finite_state_machine Finite-state machines], [[Turing Machine|Turing machines]] as well as digital [https://en.wikipedia.org/wiki/Computer computers].
<span id="SequentialRookAttack"></span>
=Sequential Rook Attack=
As an further example, a sequential logic may perform the same task as mentioned in [[Combinatorial Logic#CombinatorialAttackandDefendMap|Combinatorial Attack and Defend Map]], but with less [https://en.wikipedia.org/wiki/Logic_gates gates] in up to seven cycles - similar to the [[Bitboards|bitboard techniques]] like [[Dumb7Fill]]:
<pre>
+-------+
+------+ | |
o--/64/-- empty(square) -/64/--| 64:1 |---->| |-----o result reliable / otherwise processing after reset
+------+ | Comb. |-----o A8 is attacked by white rook from south
^ | Logic |
+------+ | |
o--/64/-- wrook(square) -/64/--| 64:1 |---->| |-->--+
+-----.+ | | |
^ o->| | |
/6| | +-------+ |
| | v
+--------------+ |
| | |
| Latch |<----------+
reset o----| |
+---^----------+
|
clk
</pre>
=See also=
* [[Belle#Hardware|Belle | Hardware Move Generation]]
* [[Combinatorial Logic]]
* [[FPGA]]
* [[Memory]]
* [[Pseudorandom Number Generator]]
=Publications=
* [[Alan H. Bond]] ('''1987'''). ''Broadcasting Arrays - A Highly Parallel Computer Architecture Suitable For Easy Fabrication''. [http://www.exso.com/bc.pdf pdf]
* [http://www.scm.tees.ac.uk/users/a.clements/ Alan Clements] ('''2005'''). ''Sequential Logic''. [http://www.oup.com/uk/orc/bin/9780199273133/clements_ch03.pdf pdf]
=External Links=
* [https://en.wikipedia.org/wiki/Sequential_logic Sequential logic from Wikipedia]
* [https://en.wikipedia.org/wiki/Counter Counter from Wikipedia]
* [https://en.wikipedia.org/wiki/Shift_register Shift register from Wikipedia]
: [https://en.wikipedia.org/wiki/Linear-feedback_shift_register Linear-feedback shift register from Wikipedia]
: [https://en.wikipedia.org/wiki/Cyclic_redundancy_check Cyclic redundancy check from Wikipedia]
* [https://en.wikipedia.org/wiki/Finite-state_machine Finite-state machine from Wikipedia]
* [http://web.cecs.pdx.edu/%7Eharry/Relay/index.html Harry Porter's Relay Computer]
* [[Videos#Passport|Passport]] - [http://www.allmusic.com/album/infinity-machine-mw0000587835 Infinity Machine], [https://en.wikipedia.org/wiki/YouTube YouTube] Video
: 1976 lineup: [[Videos#KlausDoldinger|Klaus Doldinger]], [https://en.wikipedia.org/wiki/Curt_Cress Curt Cress], [[Videos#WolfgangSchmid|Wolfgang Schmid]], [https://en.wikipedia.org/wiki/Kristian_Schultze Kristian Schultze]
: {{#evu:https://www.youtube.com/watch?v=_7CKaWqzqSM|alignment=left|valignment=top}}
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[FILE:sequential04.gif|border|right|thumb|link=http://web.mit.edu/6.111/www/f2005/tutprobs/sequential.html|Sequential circuit <ref>[http://web.mit.edu/6.111/www/f2005/tutprobs/sequential.html Sequential Logic]</ref> ]]
A '''Sequential Logic''' is a [https://en.wikipedia.org/wiki/Digital_electronics digital circuit] where one or more outputs are [https://en.wikipedia.org/wiki/Boolean_function boolean functions] of multiple inputs and the history of the outputs. In contrast to [[Combinatorial Logic|combinatorial logic]], a sequential logic requires [[Memory|memory]] to somehow feed the history of the outputs back to the inputs. Usually, for deterministic and reliable behavior considering internal [https://en.wikipedia.org/wiki/Latency_%28engineering%29 latencies] and [https://en.wikipedia.org/wiki/Propagation_delay propagation delays], a sequential logic is [https://en.wikipedia.org/wiki/Synchronous_logic synchronous], that is the memory only change their content on the edge of a [https://en.wikipedia.org/wiki/Clock_signal clock signal].
=Applications=
Sequential logic, that is [[Combinatorial Logic|combinatorial logic]] combined with [[Memory|memory]], is the base of [https://en.wikipedia.org/wiki/Finite_state_machine Finite-state machines], [[Turing Machine|Turing machines]] as well as digital [https://en.wikipedia.org/wiki/Computer computers].
<span id="SequentialRookAttack"></span>
=Sequential Rook Attack=
As an further example, a sequential logic may perform the same task as mentioned in [[Combinatorial Logic#CombinatorialAttackandDefendMap|Combinatorial Attack and Defend Map]], but with less [https://en.wikipedia.org/wiki/Logic_gates gates] in up to seven cycles - similar to the [[Bitboards|bitboard techniques]] like [[Dumb7Fill]]:
<pre>
+-------+
+------+ | |
o--/64/-- empty(square) -/64/--| 64:1 |---->| |-----o result reliable / otherwise processing after reset
+------+ | Comb. |-----o A8 is attacked by white rook from south
^ | Logic |
+------+ | |
o--/64/-- wrook(square) -/64/--| 64:1 |---->| |-->--+
+-----.+ | | |
^ o->| | |
/6| | +-------+ |
| | v
+--------------+ |
| | |
| Latch |<----------+
reset o----| |
+---^----------+
|
clk
</pre>
=See also=
* [[Belle#Hardware|Belle | Hardware Move Generation]]
* [[Combinatorial Logic]]
* [[FPGA]]
* [[Memory]]
* [[Pseudorandom Number Generator]]
=Publications=
* [[Alan H. Bond]] ('''1987'''). ''Broadcasting Arrays - A Highly Parallel Computer Architecture Suitable For Easy Fabrication''. [http://www.exso.com/bc.pdf pdf]
* [http://www.scm.tees.ac.uk/users/a.clements/ Alan Clements] ('''2005'''). ''Sequential Logic''. [http://www.oup.com/uk/orc/bin/9780199273133/clements_ch03.pdf pdf]
=External Links=
* [https://en.wikipedia.org/wiki/Sequential_logic Sequential logic from Wikipedia]
* [https://en.wikipedia.org/wiki/Counter Counter from Wikipedia]
* [https://en.wikipedia.org/wiki/Shift_register Shift register from Wikipedia]
: [https://en.wikipedia.org/wiki/Linear-feedback_shift_register Linear-feedback shift register from Wikipedia]
: [https://en.wikipedia.org/wiki/Cyclic_redundancy_check Cyclic redundancy check from Wikipedia]
* [https://en.wikipedia.org/wiki/Finite-state_machine Finite-state machine from Wikipedia]
* [http://web.cecs.pdx.edu/%7Eharry/Relay/index.html Harry Porter's Relay Computer]
* [[Videos#Passport|Passport]] - [http://www.allmusic.com/album/infinity-machine-mw0000587835 Infinity Machine], [https://en.wikipedia.org/wiki/YouTube YouTube] Video
: 1976 lineup: [[Videos#KlausDoldinger|Klaus Doldinger]], [https://en.wikipedia.org/wiki/Curt_Cress Curt Cress], [[Videos#WolfgangSchmid|Wolfgang Schmid]], [https://en.wikipedia.org/wiki/Kristian_Schultze Kristian Schultze]
: {{#evu:https://www.youtube.com/watch?v=_7CKaWqzqSM|alignment=left|valignment=top}}
=References=
<references />
'''[[Hardware|Up one Level]]'''
