HMCS4xC
HMCS4xC, (HMCS44, HMCS44C, HD44801)
a family of Hitachi 4-bit CMOSmicrocontroller (MCU) .
The single-chip controller series provide various amounts of ROM of 10-bit words (code and pattern) and RAM of up to 160 nibbles,
parallel I(O aimed for driving dot matrix LCD, timer/counter and interrupt controller.
Architecture
The HMCS44C has four nibble registers and two 1-bit registers (carry, status) available to the programmer. The status flag latches the result of arithmetical or logical operations (none zero, overflow), and affects conditional branch instructions. The 4-bit accumulator (A) is expanded by carry bit for ALU input and output, carry can bet set, reset and tested using appropriate instructions. Register B acts as sub-accumulator or counter, while the X and Y registers are used to address RAM, organized as file (X 0..9) and digit (Y 0..0x0F), Y further addresses 1-bit discrete I/O. Both index registers may by stacked by corresponding spy-registers, SPX and SPY. The ROM address range is divided by 5 page bits (page 0-31) with 64 10-bit words each, addressed by the 11-bit program counter. A stack of four registers (ST1-ST4) is used to call subroutines by the CAL instructions and to return by RTN [1].
Chess Programs
Publication
- Steve A. Money (1990, 2014). Microprocessor Data Book. Academic Press
Manuals
- Hitachi HD44801 (pdf)
External Links
References
- ↑ Hitachi HD44801 (pdf)
