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8086
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'''[[Main Page|Home]] * [[Hardware]] * 8086'''
[[FILE:Intel 8086 CPU Die.JPG|border|right|thumb|Intel 8086 CPU Die Image <ref>Intel 8086 CPU Die Image by Pdesousa359, July 03, 2010, [https://en.wikipedia.org/wiki/Intel_8086 Intel 8086 from Wikipedia]</ref> ]]
'''8086''',<br/>
a [https://en.wikipedia.org/wiki/16-bit 16-bit] [https://en.wikipedia.org/wiki/Microprocessor microprocessor] designed by [[Intel]] since 1976, released in 1978. Its principal architect was [https://en.wikipedia.org/wiki/Stephen_P._Morse Stephen P. Morse]. Marketed as [https://en.wikipedia.org/wiki/Source_code_compatibility source compatible], the 8086 was designed so that [[Assembly|assembly language]] for the 8-bit [[8080]] could be automatically converted into equivalent (sub-optimal) 8086 source code. The [https://en.wikipedia.org/wiki/Intel_8088 Intel 8088] variant had an 8-bit external [https://en.wikipedia.org/wiki/Data_bus data bus] and was used in the original [[IBM PC]]. 8086 was the forerunner of Intel's [[x86]] 32-bit architecture, starting with the [https://en.wikipedia.org/wiki/80386 80386] in 1985.
Despite the huge distribution of 8086/8088 based PCs, the 8086 was rarely found in [[Dedicated Chess Computers]].
=Registers=
The eight [[8080]] registers A, B, C, D, E, H, L, SP, with BC, DE and HL as possible 16 bit registers, were extended to eight (more or less general) 16-bit registers including the [[Stack|stack pointer]]. Four general purpose (GP) registers may treated as 16-bit [[Word]] as well as high and low [[Byte]]:
{| class="wikitable"
|-
! 16 bit
! 8 high
! 8 low
! Purpose
|-
| AX
| AH
| AL
| GP, Accumulator
|-
| BX
| BH
| BL
| GP, Base, Index Register
|-
| CX
| CH
| CL
| GP, Counter, variable shift, rotate via CL
|-
| DX
| DH
| DL
| GP, high Accumulator mul/div
|-
| SI
| -
| -
| GP, Source Index
|-
| DI
| -
| -
| GP, Destination Index
|-
| SP
| -
| -
| [[Stack|Stack Pointer]]
|-
| BP
| -
| -
| GP, Base Pointer
|-
| Segment Registers
|-
| CS
| -
| -
| Code Segment
|-
| DS
| -
| -
| Data Segment
|-
| ES
| -
| -
| Extra Segment
|-
| SS
| -
| -
| Stack Segment
|}
=Segmentation=
The 8086 was able to address one MByte of physical [[Memory|memory]] and its external [https://en.wikipedia.org/wiki/Address_bus address bus] was 20 bit wide (the first 16 [https://en.wikipedia.org/wiki/Multiplexed multiplexed] with the data bus). The [https://en.wikipedia.org/wiki/Physical_address physical address] translation was done by shifting a segment register 4 bits left and adding an 16 bit offset.
effective or physical address := 16 * segment + offset
As a result, each external address could be referred to by 2<span style="vertical-align: super;">12</span> different segment:offset pairs. Considered complicated and cumbersome by many (chess) programmers, this scheme had the advantage in porting programs less than 64 kilobytes from 8-bit 8080 avoiding the need for [https://en.wikipedia.org/wiki/Relocation_%28computer_science%29 relocation].
==Pointer==
Compilers for the 8086 supported two or even three types of pointers, '''near''', '''far''' and '''huge'''. Near pointers were 16-bit offsets implicitly associated with the program's code and/or data/stack segment and could only used within parts of a program small enough to fit in one 64 kilobyte segment. Far pointers were 32-bit segment:offset pairs. Huge pointers, which were like far pointers except that pointer arithmetic on a huge pointer treated it as a linear 20-bit pointer, while pointer arithmetic on a far pointer wrapped around within its 16-bit offset without touching the segment part of the address.
==Memory models==
To avoid the need to specify near and far on pointers, data structures, and functions, compilers supported "memory models" which specified default pointer sizes. The '''tiny''' (max 64K), '''small''' (max 128K), '''compact''' (data > 64K), '''medium''' (code > 64K), '''large''' (code,data > 64K), and '''huge''' (individual arrays > 64K) models covered practical combinations of near, far, and huge pointers for code and data. The tiny model with code and data in a single segment, just as in most 8-bit based processors, could be used to build [https://en.wikipedia.org/wiki/COM_file .com-files]. Precompiled libraries often came in several versions compiled for different memory models <ref>[https://en.wikipedia.org/wiki/Intel_8086#Segmentation Intel 8086 - Segmentation from Wikipedia]</ref> .
=Publications=
* [https://en.wikipedia.org/wiki/Steve_Ciarcia Steve Ciarcia] ('''1979'''). ''[https://archive.org/stream/byte-magazine-1979-11/1979_11_BYTE_04-11_Fun_and_Games#page/n15/mode/2up The Intel 8086]''. [[Byte Magazine#BYTE411|BYTE, Vol. 4, No. 11]], pp. 14-24
=External Links=
==Intel==
* [https://en.wikipedia.org/wiki/Intel_8086 Intel 8086 from Wikipedia]
* [https://en.wikipedia.org/wiki/Intel_8087 Intel 8087 floating point coprocessor from Wikipedia]
* [https://en.wikipedia.org/wiki/Intel_80186 Intel 80186 from Wikipedia]
* [http://www.cpu-world.com/CPUs/8086/ Intel 8086 microprocessor family] from [http://www.cpu-world.com/index.html CPU-World]
* [http://datasheets.chipdb.org/Intel/x86/808x/datashts/8086/ Index of /Intel/x86/808x/datashts/8086]
* [https://en.wikipedia.org/wiki/X86_instruction_listings x86 instruction listings from Wikipedia]
==Clones==
* [https://en.wikipedia.org/wiki/NEC_V20 NEC V20 from Wikipedia]
* [https://en.wikipedia.org/wiki/K1810BM86 K1810BM86]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[FILE:Intel 8086 CPU Die.JPG|border|right|thumb|Intel 8086 CPU Die Image <ref>Intel 8086 CPU Die Image by Pdesousa359, July 03, 2010, [https://en.wikipedia.org/wiki/Intel_8086 Intel 8086 from Wikipedia]</ref> ]]
'''8086''',<br/>
a [https://en.wikipedia.org/wiki/16-bit 16-bit] [https://en.wikipedia.org/wiki/Microprocessor microprocessor] designed by [[Intel]] since 1976, released in 1978. Its principal architect was [https://en.wikipedia.org/wiki/Stephen_P._Morse Stephen P. Morse]. Marketed as [https://en.wikipedia.org/wiki/Source_code_compatibility source compatible], the 8086 was designed so that [[Assembly|assembly language]] for the 8-bit [[8080]] could be automatically converted into equivalent (sub-optimal) 8086 source code. The [https://en.wikipedia.org/wiki/Intel_8088 Intel 8088] variant had an 8-bit external [https://en.wikipedia.org/wiki/Data_bus data bus] and was used in the original [[IBM PC]]. 8086 was the forerunner of Intel's [[x86]] 32-bit architecture, starting with the [https://en.wikipedia.org/wiki/80386 80386] in 1985.
Despite the huge distribution of 8086/8088 based PCs, the 8086 was rarely found in [[Dedicated Chess Computers]].
=Registers=
The eight [[8080]] registers A, B, C, D, E, H, L, SP, with BC, DE and HL as possible 16 bit registers, were extended to eight (more or less general) 16-bit registers including the [[Stack|stack pointer]]. Four general purpose (GP) registers may treated as 16-bit [[Word]] as well as high and low [[Byte]]:
{| class="wikitable"
|-
! 16 bit
! 8 high
! 8 low
! Purpose
|-
| AX
| AH
| AL
| GP, Accumulator
|-
| BX
| BH
| BL
| GP, Base, Index Register
|-
| CX
| CH
| CL
| GP, Counter, variable shift, rotate via CL
|-
| DX
| DH
| DL
| GP, high Accumulator mul/div
|-
| SI
| -
| -
| GP, Source Index
|-
| DI
| -
| -
| GP, Destination Index
|-
| SP
| -
| -
| [[Stack|Stack Pointer]]
|-
| BP
| -
| -
| GP, Base Pointer
|-
| Segment Registers
|-
| CS
| -
| -
| Code Segment
|-
| DS
| -
| -
| Data Segment
|-
| ES
| -
| -
| Extra Segment
|-
| SS
| -
| -
| Stack Segment
|}
=Segmentation=
The 8086 was able to address one MByte of physical [[Memory|memory]] and its external [https://en.wikipedia.org/wiki/Address_bus address bus] was 20 bit wide (the first 16 [https://en.wikipedia.org/wiki/Multiplexed multiplexed] with the data bus). The [https://en.wikipedia.org/wiki/Physical_address physical address] translation was done by shifting a segment register 4 bits left and adding an 16 bit offset.
effective or physical address := 16 * segment + offset
As a result, each external address could be referred to by 2<span style="vertical-align: super;">12</span> different segment:offset pairs. Considered complicated and cumbersome by many (chess) programmers, this scheme had the advantage in porting programs less than 64 kilobytes from 8-bit 8080 avoiding the need for [https://en.wikipedia.org/wiki/Relocation_%28computer_science%29 relocation].
==Pointer==
Compilers for the 8086 supported two or even three types of pointers, '''near''', '''far''' and '''huge'''. Near pointers were 16-bit offsets implicitly associated with the program's code and/or data/stack segment and could only used within parts of a program small enough to fit in one 64 kilobyte segment. Far pointers were 32-bit segment:offset pairs. Huge pointers, which were like far pointers except that pointer arithmetic on a huge pointer treated it as a linear 20-bit pointer, while pointer arithmetic on a far pointer wrapped around within its 16-bit offset without touching the segment part of the address.
==Memory models==
To avoid the need to specify near and far on pointers, data structures, and functions, compilers supported "memory models" which specified default pointer sizes. The '''tiny''' (max 64K), '''small''' (max 128K), '''compact''' (data > 64K), '''medium''' (code > 64K), '''large''' (code,data > 64K), and '''huge''' (individual arrays > 64K) models covered practical combinations of near, far, and huge pointers for code and data. The tiny model with code and data in a single segment, just as in most 8-bit based processors, could be used to build [https://en.wikipedia.org/wiki/COM_file .com-files]. Precompiled libraries often came in several versions compiled for different memory models <ref>[https://en.wikipedia.org/wiki/Intel_8086#Segmentation Intel 8086 - Segmentation from Wikipedia]</ref> .
=Publications=
* [https://en.wikipedia.org/wiki/Steve_Ciarcia Steve Ciarcia] ('''1979'''). ''[https://archive.org/stream/byte-magazine-1979-11/1979_11_BYTE_04-11_Fun_and_Games#page/n15/mode/2up The Intel 8086]''. [[Byte Magazine#BYTE411|BYTE, Vol. 4, No. 11]], pp. 14-24
=External Links=
==Intel==
* [https://en.wikipedia.org/wiki/Intel_8086 Intel 8086 from Wikipedia]
* [https://en.wikipedia.org/wiki/Intel_8087 Intel 8087 floating point coprocessor from Wikipedia]
* [https://en.wikipedia.org/wiki/Intel_80186 Intel 80186 from Wikipedia]
* [http://www.cpu-world.com/CPUs/8086/ Intel 8086 microprocessor family] from [http://www.cpu-world.com/index.html CPU-World]
* [http://datasheets.chipdb.org/Intel/x86/808x/datashts/8086/ Index of /Intel/x86/808x/datashts/8086]
* [https://en.wikipedia.org/wiki/X86_instruction_listings x86 instruction listings from Wikipedia]
==Clones==
* [https://en.wikipedia.org/wiki/NEC_V20 NEC V20 from Wikipedia]
* [https://en.wikipedia.org/wiki/K1810BM86 K1810BM86]
=References=
<references />
'''[[Hardware|Up one Level]]'''
