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Created page with "'''Home * Hardware * VLSI Design''' FILE:5-4.Deep_Blue_chip,lg.jpg|border|right|thumb|link=http://www.computerhistory.org/chess/full_record.php?iid=art-43..."
'''[[Main Page|Home]] * [[Hardware]] * VLSI Design'''
[[FILE:5-4.Deep_Blue_chip,lg.jpg|border|right|thumb|link=http://www.computerhistory.org/chess/full_record.php?iid=art-431614f45291e| [[Deep Blue]] VLSI chip <ref>[http://www.computerhistory.org/chess/full_record.php?iid=art-431614f45291e Deep blue chip], [[IBM|International Business Machines (IBM)]], 1997, Gift of [[Feng-hsiung Hsu]], [[The Computer History Museum]]</ref> ]]
'''VLSI Design''', (Very Large Scale Integration) <br/>
an [[Integrated Circuits|integrated circuit]] design combining a very large number (typically several 100 thousands or millions) of [https://en.wikipedia.org/wiki/MOSFET MOS transistors] onto a single chip <ref>[https://en.wikipedia.org/wiki/Very_Large_Scale_Integration Very Large Scale Integration from Wikipedia]</ref>.
Since the late 70s, until today, microprocessors and memory chips are VLSI chips. In 1978-1979, [https://en.wikipedia.org/wiki/California_Institute_of_Technology Caltech] professor [[Mathematician#CAMead|Carver Mead]] and scientist [https://en.wikipedia.org/wiki/Lynn_Conway Lynn Conway] <ref>[http://ai.eecs.umich.edu/people/conway/Impact/Impact.html Impact of the Mead-Conway innovations in VLSI chip design and implementation methodology - An overview by Lynn Conway], November 16, 2007</ref>
wrote the textbook ''Introduction to VLSI Systems'' and taught simple design rules suited for [https://en.wikipedia.org/wiki/Electronic_design_automation electronic design automation]
starting the [https://en.wikipedia.org/wiki/Mead_%26_Conway_revolution VLSI revolution]. In 1980, the [https://en.wikipedia.org/wiki/DARPA Defense Advanced Research Projects Agency] of the [https://en.wikipedia.org/wiki/United_States United States] began the [https://en.wikipedia.org/wiki/United_States_Department_of_Defense DoD's] new [https://en.wikipedia.org/wiki/VLSI_Project VLSI research project] to support extensions of this work,
which resulted in many university and industry researchers learning and improving the Mead-Conway innovations.
=VLSI in Computer Chess=
Inspired by the hardware move generator design of [[Belle]] and motivated by the Mead-Conway innovations, several universities researched on VLSI Design in computer chess.
Most notable and successful was the [[Carnegie Mellon University]] headed by [[Mathematician#Kung|Hsiang-Tsung Kung]] along with [[Charles Leiserson|Charles E. Leiserson]], who introduced [https://en.wikipedia.org/wiki/Systolic_array systolic arrays] suited for VLSI design.
The primary protagonists of the rival chess programs of [[HiTech]] and [[ChipTest]], which later evolved to [[Deep Thought]] and [[Deep Blue]], were [[Hans Berliner]], [[Carl Ebeling]] and [[Andrew James Palay]] et al., versus [[Feng-hsiung Hsu]], [[Thomas Anantharaman]] and [[Murray Campbell]].
A team around [[Jonathan Schaeffer]] worked at the [[University of Waterloo]] on VLSI chess chips <ref>[https://uwaterloo.ca/water-under-the-bridge/1983 1983 | Waking up to change] in [https://uwaterloo.ca/water-under-the-bridge/about-authors Chris Redmond and Simon the Troll] ('''1998'''). ''[https://uwaterloo.ca/water-under-the-bridge/ Water Under the Bridge]''. [[University of Waterloo]]</ref>.
while [[James Testa]] and [[Alvin M. Despain]] from the [[University of California, Berkeley]] build the [[Berkeley Chess Microprocessor]].
At the [[University of Hamburg]] a team around [[Alexander Reinefeld]] and [[Dieter Steinwender]] build [[MicroMurks]] in 1981/82, a [[68000]] based system
with own chips and VLSI layout <ref>[[Alexander Reinefeld]] ('''2005'''). ''Die Entwicklung der Spielprogrammierung: Von John von Neumann bis zu den hochparallelen Schachmaschinen''. [http://www.informatik.hu-berlin.de/studium/ringvorlesung/ss05/slides/05-06-02.pdf slides as pdf], Themen der Informatik im historischen Kontext Ringvorlesung an der [https://en.wikipedia.org/wiki/Humboldt_University_of_Berlin HU Berlin], 02.06.2005 (English paper, German title)</ref>.
=See also=
* [[Integrated Circuits]]
* [[FPGA]]
=Selected Publications=
==1979==
* [https://en.wikipedia.org/wiki/Lynn_Conway Lynn Conway] ('''1979'''). ''. "The MIT'78 VLSI System Design Course: A Guidebook for the Instructor of VLSI System Design''. [http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/InstGuide.pdf pdf]
* [[Mathematician#Kung|Hsiang-Tsung Kung]], [[Charles Leiserson|Charles E. Leiserson]] ('''1979'''). ''[https://apps.dtic.mil/docs/citations/ADA066060 Systolic arrays (for VLSI)]''. [https://searchworks.stanford.edu/view/786087 Sparse Matrix Proceedings] 1978 <ref>[https://en.wikipedia.org/wiki/Systolic_array Systolic array from Wikipedia]</ref>
==1980 ...==
* [[Mathematician#CAMead|Carver Mead]], [https://en.wikipedia.org/wiki/Lynn_Conway Lynn Conway] ('''1980'''). ''[https://archive.org/details/introductiontovl00mead Introduction to VLSI systems]''. [https://en.wikipedia.org/wiki/Addison-Wesley Addison-Wesley]
* [[Charles Leiserson|Charles E. Leiserson]] ('''1981'''). ''Area-Efficient VLSI Computation''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#Kung|Hsiang-Tsung Kung]], [https://apps.dtic.mil/dtic/tr/fulltext/u2/a123318.pdf pdf]
* [[Mathematician#UCWeiser|Uri Weiser]], [[Mathematician#AlDavis|Al Davis]] ('''1981'''). ''[https://link.springer.com/chapter/10.1007/978-3-642-68402-9_25 A Wavefront Notation Tool for VLSI Array Design]''. in [[Mathematician#Kung|Hsiang-Tsung Kung]], [[Mathematician#BSproull|Bob Sproull]], [[Mathematician#GSteele|Guy Steele]] (eds.) ('''1981'''). ''[https://link.springer.com/book/10.1007/978-3-642-68402-9 VLSI Systems and Computations]''. [https://en.wikipedia.org/wiki/Springer_Science%2BBusiness_Media Springer]
* [[Gérard M. Baudet]] ('''1981'''). ''[https://link.springer.com/chapter/10.1007/978-3-642-68402-9_12 On the Area Required by VLSI Circuits]''. in [[Mathematician#Kung|Hsiang-Tsung Kung]], [[Mathematician#BSproull|Bob Sproull]], [[Mathematician#GSteele|Guy Steele]] (eds.) ''[https://link.springer.com/book/10.1007/978-3-642-68402-9 VLSI Systems and Computations]''. [https://en.wikipedia.org/wiki/Springer_Science%2BBusiness_Media Springer]
* [[Mathematician#Kung|Hsiang-Tsung Kung]] ('''1982'''). ''[https://ieeexplore.ieee.org/document/1653825 Why Systolic Architectures?]'' [[IEEE#Computer|IEEE Computer]], Vol. 15, No. 1, [http://www.eecs.harvard.edu/~htk/publication/1982-kung-why-systolic-architecture.pdf pdf]
* [[Greg Bakker]], [[Jim Jonkman]], [[Jonathan Schaeffer]], [[Tom Schultz]] ('''1982'''). ''VLSI Implementation of a Chess Legal Move Generator''. EE755S-1, [[University of Waterloo]]
* [[Jonathan Schaeffer]], [[Patrick A.D. Powell]], [[Jim Jonkman]] ('''1983'''). ''[https://link.springer.com/chapter/10.1007/978-3-642-95432-0_19 A VLSI legal move generator for the game of chess]''. in [[Mathematician#REBryant|Randal E. Bryant]] (eds.) [https://link.springer.com/book/10.1007%2F978-3-642-95432-0 Third Caltech Conference on Very Large Scale Integration]
* [[Gérard M. Baudet]], [https://en.wikipedia.org/wiki/Franco_P._Preparata Franco P. Preparata], [[Mathematician#JVuillemin|Jean Vuillemin]] ('''1983'''). ''[https://ieeexplore.ieee.org/document/1676300 Area-Time Optimal VLSI Circuits for Convolution]''. [[IEEE#TOC|IEEE Transactions on Computers]], Vol. 32, No 7
* [[Carl Ebeling]], [[Andrew James Palay]] ('''1984'''). ''The Design and Implementation of a VLSI Chess Move Generator''. Proceedings of the 11th Annual International Symposium on Computer Architecture. [[IEEE]] and [[ACM]].
* [[Carl Ebeling]] ('''1986'''). ''All the Right Moves: A VLSI Architecture for Chess''. Ph.D. thesis, [[Carnegie Mellon University]], [https://en.wikipedia.org/wiki/MIT_Press MIT Press] <ref>[http://www.talkchess.com/forum/viewtopic.php?t=41743 Any opinion about this book?: "All the Right Moves"] by E Diaz, [[CCC]], January 02, 2012</ref>
* [[Feng-hsiung Hsu]] ('''1986'''). ''[http://repository.cmu.edu/compsci/1566/ Two designs of functional units for VLSI based chess machines]''. [[Carnegie Mellon University]], Computer Science Department. Paper 1566.
* [[Feng-hsiung Hsu]] ('''1987'''). ''A Two-Million Moves/Sec CMOS Single-Chip Chess Move Generator''. [[IEEE#JSSC|IEEE Journal of Solid-state Circuits]], Vol. 22, No. 5
==1990 ...==
* [[Feng-hsiung Hsu]], [[Thomas Anantharaman]], [[Murray Campbell]], [[Andreas Nowatzyk]] ('''1990'''). ''[http://www.disi.unige.it/person/DelzannoG/AI2/hsu.html A Grandmaster Chess Machine]''. [[Scientific American]], Vol. 263, No. 4
* [[James Testa]], [[Alvin M. Despain]] ('''1990'''). ''[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=124744&contentType=Conference+Publications&searchWithin%3Dp_Authors%3A.QT.Testa%2C+J..QT. A CMOS VLSI chess microprocessor]''. [[University of California, Berkeley]], [[IEEE]] Custom Integrated Circuit Conference
* [[Feng-hsiung Hsu]], [[Murray Campbell]], [[Joe Hoane]] ('''1995'''). ''[http://www.computerhistory.org/chess/doc-431614f6de120/ Deep Blue System Overview]''. International Conference on Supercomputing
* [[Feng-hsiung Hsu]] ('''1999'''). ''IBM’s Deep Blue Chess Grandmaster Chips''. [[IEEE#Micro|IEEE Micro]], Vol. 19, No. 2, [http://www.csis.pace.edu/~ctappert/dps/pdf/ai-chess-deep.pdf pdf]
=External Links=
* [https://en.wikipedia.org/wiki/Very_Large_Scale_Integration Very Large Scale Integration from Wikipedia]
* [https://en.wikipedia.org/wiki/Mead_%26_Conway_revolution Mead & Conway revolution from Wikipedia]
* [https://en.wikipedia.org/wiki/VLSI_Project VLSI Project from Wikipedia]
* [https://en.wikipedia.org/wiki/Systolic_array Systolic array from Wikipedia]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[Category:Die]]
[[FILE:5-4.Deep_Blue_chip,lg.jpg|border|right|thumb|link=http://www.computerhistory.org/chess/full_record.php?iid=art-431614f45291e| [[Deep Blue]] VLSI chip <ref>[http://www.computerhistory.org/chess/full_record.php?iid=art-431614f45291e Deep blue chip], [[IBM|International Business Machines (IBM)]], 1997, Gift of [[Feng-hsiung Hsu]], [[The Computer History Museum]]</ref> ]]
'''VLSI Design''', (Very Large Scale Integration) <br/>
an [[Integrated Circuits|integrated circuit]] design combining a very large number (typically several 100 thousands or millions) of [https://en.wikipedia.org/wiki/MOSFET MOS transistors] onto a single chip <ref>[https://en.wikipedia.org/wiki/Very_Large_Scale_Integration Very Large Scale Integration from Wikipedia]</ref>.
Since the late 70s, until today, microprocessors and memory chips are VLSI chips. In 1978-1979, [https://en.wikipedia.org/wiki/California_Institute_of_Technology Caltech] professor [[Mathematician#CAMead|Carver Mead]] and scientist [https://en.wikipedia.org/wiki/Lynn_Conway Lynn Conway] <ref>[http://ai.eecs.umich.edu/people/conway/Impact/Impact.html Impact of the Mead-Conway innovations in VLSI chip design and implementation methodology - An overview by Lynn Conway], November 16, 2007</ref>
wrote the textbook ''Introduction to VLSI Systems'' and taught simple design rules suited for [https://en.wikipedia.org/wiki/Electronic_design_automation electronic design automation]
starting the [https://en.wikipedia.org/wiki/Mead_%26_Conway_revolution VLSI revolution]. In 1980, the [https://en.wikipedia.org/wiki/DARPA Defense Advanced Research Projects Agency] of the [https://en.wikipedia.org/wiki/United_States United States] began the [https://en.wikipedia.org/wiki/United_States_Department_of_Defense DoD's] new [https://en.wikipedia.org/wiki/VLSI_Project VLSI research project] to support extensions of this work,
which resulted in many university and industry researchers learning and improving the Mead-Conway innovations.
=VLSI in Computer Chess=
Inspired by the hardware move generator design of [[Belle]] and motivated by the Mead-Conway innovations, several universities researched on VLSI Design in computer chess.
Most notable and successful was the [[Carnegie Mellon University]] headed by [[Mathematician#Kung|Hsiang-Tsung Kung]] along with [[Charles Leiserson|Charles E. Leiserson]], who introduced [https://en.wikipedia.org/wiki/Systolic_array systolic arrays] suited for VLSI design.
The primary protagonists of the rival chess programs of [[HiTech]] and [[ChipTest]], which later evolved to [[Deep Thought]] and [[Deep Blue]], were [[Hans Berliner]], [[Carl Ebeling]] and [[Andrew James Palay]] et al., versus [[Feng-hsiung Hsu]], [[Thomas Anantharaman]] and [[Murray Campbell]].
A team around [[Jonathan Schaeffer]] worked at the [[University of Waterloo]] on VLSI chess chips <ref>[https://uwaterloo.ca/water-under-the-bridge/1983 1983 | Waking up to change] in [https://uwaterloo.ca/water-under-the-bridge/about-authors Chris Redmond and Simon the Troll] ('''1998'''). ''[https://uwaterloo.ca/water-under-the-bridge/ Water Under the Bridge]''. [[University of Waterloo]]</ref>.
while [[James Testa]] and [[Alvin M. Despain]] from the [[University of California, Berkeley]] build the [[Berkeley Chess Microprocessor]].
At the [[University of Hamburg]] a team around [[Alexander Reinefeld]] and [[Dieter Steinwender]] build [[MicroMurks]] in 1981/82, a [[68000]] based system
with own chips and VLSI layout <ref>[[Alexander Reinefeld]] ('''2005'''). ''Die Entwicklung der Spielprogrammierung: Von John von Neumann bis zu den hochparallelen Schachmaschinen''. [http://www.informatik.hu-berlin.de/studium/ringvorlesung/ss05/slides/05-06-02.pdf slides as pdf], Themen der Informatik im historischen Kontext Ringvorlesung an der [https://en.wikipedia.org/wiki/Humboldt_University_of_Berlin HU Berlin], 02.06.2005 (English paper, German title)</ref>.
=See also=
* [[Integrated Circuits]]
* [[FPGA]]
=Selected Publications=
==1979==
* [https://en.wikipedia.org/wiki/Lynn_Conway Lynn Conway] ('''1979'''). ''. "The MIT'78 VLSI System Design Course: A Guidebook for the Instructor of VLSI System Design''. [http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/InstGuide.pdf pdf]
* [[Mathematician#Kung|Hsiang-Tsung Kung]], [[Charles Leiserson|Charles E. Leiserson]] ('''1979'''). ''[https://apps.dtic.mil/docs/citations/ADA066060 Systolic arrays (for VLSI)]''. [https://searchworks.stanford.edu/view/786087 Sparse Matrix Proceedings] 1978 <ref>[https://en.wikipedia.org/wiki/Systolic_array Systolic array from Wikipedia]</ref>
==1980 ...==
* [[Mathematician#CAMead|Carver Mead]], [https://en.wikipedia.org/wiki/Lynn_Conway Lynn Conway] ('''1980'''). ''[https://archive.org/details/introductiontovl00mead Introduction to VLSI systems]''. [https://en.wikipedia.org/wiki/Addison-Wesley Addison-Wesley]
* [[Charles Leiserson|Charles E. Leiserson]] ('''1981'''). ''Area-Efficient VLSI Computation''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#Kung|Hsiang-Tsung Kung]], [https://apps.dtic.mil/dtic/tr/fulltext/u2/a123318.pdf pdf]
* [[Mathematician#UCWeiser|Uri Weiser]], [[Mathematician#AlDavis|Al Davis]] ('''1981'''). ''[https://link.springer.com/chapter/10.1007/978-3-642-68402-9_25 A Wavefront Notation Tool for VLSI Array Design]''. in [[Mathematician#Kung|Hsiang-Tsung Kung]], [[Mathematician#BSproull|Bob Sproull]], [[Mathematician#GSteele|Guy Steele]] (eds.) ('''1981'''). ''[https://link.springer.com/book/10.1007/978-3-642-68402-9 VLSI Systems and Computations]''. [https://en.wikipedia.org/wiki/Springer_Science%2BBusiness_Media Springer]
* [[Gérard M. Baudet]] ('''1981'''). ''[https://link.springer.com/chapter/10.1007/978-3-642-68402-9_12 On the Area Required by VLSI Circuits]''. in [[Mathematician#Kung|Hsiang-Tsung Kung]], [[Mathematician#BSproull|Bob Sproull]], [[Mathematician#GSteele|Guy Steele]] (eds.) ''[https://link.springer.com/book/10.1007/978-3-642-68402-9 VLSI Systems and Computations]''. [https://en.wikipedia.org/wiki/Springer_Science%2BBusiness_Media Springer]
* [[Mathematician#Kung|Hsiang-Tsung Kung]] ('''1982'''). ''[https://ieeexplore.ieee.org/document/1653825 Why Systolic Architectures?]'' [[IEEE#Computer|IEEE Computer]], Vol. 15, No. 1, [http://www.eecs.harvard.edu/~htk/publication/1982-kung-why-systolic-architecture.pdf pdf]
* [[Greg Bakker]], [[Jim Jonkman]], [[Jonathan Schaeffer]], [[Tom Schultz]] ('''1982'''). ''VLSI Implementation of a Chess Legal Move Generator''. EE755S-1, [[University of Waterloo]]
* [[Jonathan Schaeffer]], [[Patrick A.D. Powell]], [[Jim Jonkman]] ('''1983'''). ''[https://link.springer.com/chapter/10.1007/978-3-642-95432-0_19 A VLSI legal move generator for the game of chess]''. in [[Mathematician#REBryant|Randal E. Bryant]] (eds.) [https://link.springer.com/book/10.1007%2F978-3-642-95432-0 Third Caltech Conference on Very Large Scale Integration]
* [[Gérard M. Baudet]], [https://en.wikipedia.org/wiki/Franco_P._Preparata Franco P. Preparata], [[Mathematician#JVuillemin|Jean Vuillemin]] ('''1983'''). ''[https://ieeexplore.ieee.org/document/1676300 Area-Time Optimal VLSI Circuits for Convolution]''. [[IEEE#TOC|IEEE Transactions on Computers]], Vol. 32, No 7
* [[Carl Ebeling]], [[Andrew James Palay]] ('''1984'''). ''The Design and Implementation of a VLSI Chess Move Generator''. Proceedings of the 11th Annual International Symposium on Computer Architecture. [[IEEE]] and [[ACM]].
* [[Carl Ebeling]] ('''1986'''). ''All the Right Moves: A VLSI Architecture for Chess''. Ph.D. thesis, [[Carnegie Mellon University]], [https://en.wikipedia.org/wiki/MIT_Press MIT Press] <ref>[http://www.talkchess.com/forum/viewtopic.php?t=41743 Any opinion about this book?: "All the Right Moves"] by E Diaz, [[CCC]], January 02, 2012</ref>
* [[Feng-hsiung Hsu]] ('''1986'''). ''[http://repository.cmu.edu/compsci/1566/ Two designs of functional units for VLSI based chess machines]''. [[Carnegie Mellon University]], Computer Science Department. Paper 1566.
* [[Feng-hsiung Hsu]] ('''1987'''). ''A Two-Million Moves/Sec CMOS Single-Chip Chess Move Generator''. [[IEEE#JSSC|IEEE Journal of Solid-state Circuits]], Vol. 22, No. 5
==1990 ...==
* [[Feng-hsiung Hsu]], [[Thomas Anantharaman]], [[Murray Campbell]], [[Andreas Nowatzyk]] ('''1990'''). ''[http://www.disi.unige.it/person/DelzannoG/AI2/hsu.html A Grandmaster Chess Machine]''. [[Scientific American]], Vol. 263, No. 4
* [[James Testa]], [[Alvin M. Despain]] ('''1990'''). ''[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=124744&contentType=Conference+Publications&searchWithin%3Dp_Authors%3A.QT.Testa%2C+J..QT. A CMOS VLSI chess microprocessor]''. [[University of California, Berkeley]], [[IEEE]] Custom Integrated Circuit Conference
* [[Feng-hsiung Hsu]], [[Murray Campbell]], [[Joe Hoane]] ('''1995'''). ''[http://www.computerhistory.org/chess/doc-431614f6de120/ Deep Blue System Overview]''. International Conference on Supercomputing
* [[Feng-hsiung Hsu]] ('''1999'''). ''IBM’s Deep Blue Chess Grandmaster Chips''. [[IEEE#Micro|IEEE Micro]], Vol. 19, No. 2, [http://www.csis.pace.edu/~ctappert/dps/pdf/ai-chess-deep.pdf pdf]
=External Links=
* [https://en.wikipedia.org/wiki/Very_Large_Scale_Integration Very Large Scale Integration from Wikipedia]
* [https://en.wikipedia.org/wiki/Mead_%26_Conway_revolution Mead & Conway revolution from Wikipedia]
* [https://en.wikipedia.org/wiki/VLSI_Project VLSI Project from Wikipedia]
* [https://en.wikipedia.org/wiki/Systolic_array Systolic array from Wikipedia]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[Category:Die]]
