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SAM
,Created page with "'''Home * Hardware * SAM''' FILE:SAM47Die.jpg|border|right|thumb| Samsung S3P7588 4bit SAM47 core MCU [https://en.wikipedia.org/wiki/Die_%28integrated_ci..."
'''[[Main Page|Home]] * [[Hardware]] * SAM'''
[[FILE:SAM47Die.jpg|border|right|thumb| Samsung S3P7588 4bit SAM47 core MCU [https://en.wikipedia.org/wiki/Die_%28integrated_circuit%29 die] <ref>[https://www.ebay.com/itm/112321771858 100pcs Samsung S3P7588 4bit SAM47 core MCU silicon dies], [https://en.wikipedia.org/wiki/EBay EBay]</ref> ]]
'''SAM''', (SAM47, Samsung Arrangeable Microcontrollers)<br/>
a family of [https://en.wikipedia.org/wiki/Samsung_Electronics Samsung] [https://en.wikipedia.org/wiki/4-bit_computing 4-bit] [https://en.wikipedia.org/wiki/Microcontroller microcontroller] (MCU) with the eponymous CPU core. The single-chip controller of the S3C7xxx, KS56C2x and KS57C2x series provide various amounts of [[Memory#ROM|ROM]] and [[Nibble|nibble]] or [[Byte|byte]] addressable [[Memory#RAM|RAM]], [https://en.wikipedia.org/wiki/Parallel_I/O parallel] and [https://en.wikipedia.org/wiki/Serial_communication serial] [https://en.wikipedia.org/wiki/Input/output I/O], 8-bit timer/counter, [https://en.wikipedia.org/wiki/Programmable_interrupt_controller interrupt controller], and [https://en.wikipedia.org/wiki/Liquid-crystal_display LCD] direct drive capability.
Samsung provides development tools, such as the Samsung Arrangeable Microcontroller (SAM) Assembler <ref>[https://manualsbrain.com/en/manuals/1196631/?page=455 19-Development Tools - Samsung S3C9228/P9228 User Manual - Page 455 of 462 | Manualsbrain.com]</ref>.
=Architecture=
RAM is organized in three banks, 0, 1 and 15 of 256 nibbles each. The lowest 32 nibbles of bank 0 (000H–01FH) are used as working [https://en.wikipedia.org/wiki/Processor_register registers],
the remaining 224 nibbles can be used both as [https://en.wikipedia.org/wiki/Call_stack stack area] and as general-purpose data memory, bank 1 for general-purpose use and bank 15 for [https://en.wikipedia.org/wiki/Memory-mapped_I/O memory-mapped I/O].
There are multiple [https://en.wikipedia.org/wiki/Addressing_mode addressing modes], a 8-bit mode requires a even nibble address inside a pair of 4-bit registers.
The register area is divided into four register banks 0 to 3 selected by the register bank selection instruction (SRB n), bank 0 for the main program, 1-3 for interrupt routines.
Each of the register banks is subdivided into eight 4-bit registers A (lsn), E, L, H, X, W, Z, Y (msn) with EA, HL, WX, YZ as possible register pairs, as well as the cross mapped WL.
With appropriate instructions, registers can be manipulated as 1-bit units, 4-bit units or, using paired registers, as 8-bit units, the latter also used as pointer for indirect addressing.
Further the CPU has the obligatory 13- or 14-bit [https://en.wikipedia.org/wiki/Program_counter program counter] and 8-bit [https://en.wikipedia.org/wiki/Call_stack#STACK-POINTER stack pointer], a 16-bit sequential carrier (BSC) register, and status word.
=Chess Programs=
* [[:Category:SAM]]
=Manuals=
* [https://www.manualslib.com/products/Samsung-Ks57c2308-337897.html Samsung KS57C2308 Manuals | ManualsLib]
* [https://manualsbrain.com/en/manuals/1196631/ Samsung S3C9228/P9228 User Manual | Manualsbrain.com]
* [https://www.datasheet.directory/index.php?title=Special:PdfViewer&url=https%3A%2F%2Fdatasheet.iiic.cc%2Fdatasheets-1%2Fsamsung_semiconductor_division%2FKS57C2316Q-XX.pdf KS57C2316Q-XX Datasheet PDF Viewer]
=External Links=
* [https://www.schach-computer.info/wiki/index.php/KS56C220 KS56C220] - [https://www.schach-computer.info/wiki/index.php?title=Hauptseite_En Schachcomputer.info Wiki]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[Category:Die]]
[[FILE:SAM47Die.jpg|border|right|thumb| Samsung S3P7588 4bit SAM47 core MCU [https://en.wikipedia.org/wiki/Die_%28integrated_circuit%29 die] <ref>[https://www.ebay.com/itm/112321771858 100pcs Samsung S3P7588 4bit SAM47 core MCU silicon dies], [https://en.wikipedia.org/wiki/EBay EBay]</ref> ]]
'''SAM''', (SAM47, Samsung Arrangeable Microcontrollers)<br/>
a family of [https://en.wikipedia.org/wiki/Samsung_Electronics Samsung] [https://en.wikipedia.org/wiki/4-bit_computing 4-bit] [https://en.wikipedia.org/wiki/Microcontroller microcontroller] (MCU) with the eponymous CPU core. The single-chip controller of the S3C7xxx, KS56C2x and KS57C2x series provide various amounts of [[Memory#ROM|ROM]] and [[Nibble|nibble]] or [[Byte|byte]] addressable [[Memory#RAM|RAM]], [https://en.wikipedia.org/wiki/Parallel_I/O parallel] and [https://en.wikipedia.org/wiki/Serial_communication serial] [https://en.wikipedia.org/wiki/Input/output I/O], 8-bit timer/counter, [https://en.wikipedia.org/wiki/Programmable_interrupt_controller interrupt controller], and [https://en.wikipedia.org/wiki/Liquid-crystal_display LCD] direct drive capability.
Samsung provides development tools, such as the Samsung Arrangeable Microcontroller (SAM) Assembler <ref>[https://manualsbrain.com/en/manuals/1196631/?page=455 19-Development Tools - Samsung S3C9228/P9228 User Manual - Page 455 of 462 | Manualsbrain.com]</ref>.
=Architecture=
RAM is organized in three banks, 0, 1 and 15 of 256 nibbles each. The lowest 32 nibbles of bank 0 (000H–01FH) are used as working [https://en.wikipedia.org/wiki/Processor_register registers],
the remaining 224 nibbles can be used both as [https://en.wikipedia.org/wiki/Call_stack stack area] and as general-purpose data memory, bank 1 for general-purpose use and bank 15 for [https://en.wikipedia.org/wiki/Memory-mapped_I/O memory-mapped I/O].
There are multiple [https://en.wikipedia.org/wiki/Addressing_mode addressing modes], a 8-bit mode requires a even nibble address inside a pair of 4-bit registers.
The register area is divided into four register banks 0 to 3 selected by the register bank selection instruction (SRB n), bank 0 for the main program, 1-3 for interrupt routines.
Each of the register banks is subdivided into eight 4-bit registers A (lsn), E, L, H, X, W, Z, Y (msn) with EA, HL, WX, YZ as possible register pairs, as well as the cross mapped WL.
With appropriate instructions, registers can be manipulated as 1-bit units, 4-bit units or, using paired registers, as 8-bit units, the latter also used as pointer for indirect addressing.
Further the CPU has the obligatory 13- or 14-bit [https://en.wikipedia.org/wiki/Program_counter program counter] and 8-bit [https://en.wikipedia.org/wiki/Call_stack#STACK-POINTER stack pointer], a 16-bit sequential carrier (BSC) register, and status word.
=Chess Programs=
* [[:Category:SAM]]
=Manuals=
* [https://www.manualslib.com/products/Samsung-Ks57c2308-337897.html Samsung KS57C2308 Manuals | ManualsLib]
* [https://manualsbrain.com/en/manuals/1196631/ Samsung S3C9228/P9228 User Manual | Manualsbrain.com]
* [https://www.datasheet.directory/index.php?title=Special:PdfViewer&url=https%3A%2F%2Fdatasheet.iiic.cc%2Fdatasheets-1%2Fsamsung_semiconductor_division%2FKS57C2316Q-XX.pdf KS57C2316Q-XX Datasheet PDF Viewer]
=External Links=
* [https://www.schach-computer.info/wiki/index.php/KS56C220 KS56C220] - [https://www.schach-computer.info/wiki/index.php?title=Hauptseite_En Schachcomputer.info Wiki]
=References=
<references />
'''[[Hardware|Up one Level]]'''
[[Category:Die]]
