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'''x86-mnemonics''' <br/>
[[x86]] has general purpose instruction instructions, [[BMI2]] general purpose instructions not affecting processor flags, as well as [[SIMD and SWAR Techniques|SIMD-instructions]] for various shifts:
<pre>
shr rax, cl ; rax >>= cl
shl rax, cl ; rax <<= cl
shrx r64a, r/m64, r64b; BMI2 r64a = r/m64 >> r64b
shlx r64a, r/m64, r64b; BMI2 r64a = r/m64 << r64b
psrlq mm0, mm1 ; MMX mm0 >>= mm1
psllq mm0, mm1 ; MMX mm0 <<= mm1
