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Created page with "'''Home * People * Zeljko Zilic''' FILE:ZeljkoZilic.jpg|border|right|thumb|link=http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php| Zeljko Zil..."
'''[[Main Page|Home]] * [[People]] * Zeljko Zilic'''
[[FILE:ZeljkoZilic.jpg|border|right|thumb|link=http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php| Zeljko Zilic <ref>[http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php Zilic, Z., Ph.D., P. Eng.] within Integrated Microsystems Laboratory of [[McGill University]]</ref> ]]
'''Zeljko Zilic''',<br/>
a [https://en.wikipedia.org/wiki/Croatian_Canadians Croatian Canadian] electrical engineer and computer scientist, and associate professor at [[McGill University]].
He holds a [https://en.wikipedia.org/wiki/Bachelor_of_Engineering B. Eng] from [https://en.wikipedia.org/wiki/University_of_Zagreb University of Zagreb] and received his Ph.D. and M.Sc. from the [[University of Toronto]]. His research interests covers [https://en.wikipedia.org/wiki/Logic_synthesis logic synthesis], testing, verification and debug [[FPGA]], [https://en.wikipedia.org/wiki/Embedded_system embedded], [https://en.wikipedia.org/wiki/Wireless wireless] and [https://en.wikipedia.org/wiki/Multiprocessing multiprocessor] systems as well as [https://en.wikipedia.org/wiki/Symbolic_computation algebraic], [https://en.wikipedia.org/wiki/Combinatorics combinatorial] and [https://en.wikipedia.org/wiki/Quantum_computer quantum algorithms] <ref>[http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php#interests Zilic, Z., Ph.D., P. Eng. - Research Interests]</ref>.
=Selected Publications=
<ref>[http://www.iml.ece.mcgill.ca/people/professors/zilic/publications.php Zeljko Zilic - Publications]</ref> <ref>[https://dblp.uni-trier.de/pers/hd/z/Zilic:Zeljko dblp: Zeljko Zilic]</ref>
==1990 ...==
* [[Zeljko Zilic]], [[Zvonko Vranesic]] ('''1993'''). ''[https://ieeexplore.ieee.org/document/289552/ Current-Mode CMOS Galois Field Circuits]''. [https://dblp.uni-trier.de/db/conf/ismvl/ismvl1993.html ISMVL 1993]
* [[Zeljko Zilic]], [[Zvonko Vranesic]] ('''1995'''). ''[https://ieeexplore.ieee.org/document/403717/ A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions]''. [[IEEE#TOC|IEEE Transactions on Computers]], Vol. 44, No. 8 <ref>[https://en.wikipedia.org/wiki/Reed%E2%80%93Muller_code Reed–Muller code from Wikipedia]</ref>
* [[Zeljko Zilic]], [[Zvonko Vranesic]] ('''1996'''). ''[https://www.computer.org/csdl/proceedings/fpga/1996/2576/00/25760024-abs.html Using BDDs to Design ULMs for FPGAs]''. [https://dblp.uni-trier.de/db/conf/fpga/fpga96.html FPGA 1996]
* [https://www.linkedin.com/in/ante-grbi%C4%87-0657665b/ Ante Grbić], [http://www.eecg.toronto.edu/%7Ebrown/ Stephen Brown], [https://dblp.uni-trier.de/pers/hd/c/Caranci:S= Steve Caranci], [https://www.linkedin.com/in/robin-grindley-47550/ Robin Grindley], [https://dblp.uni-trier.de/pers/hd/g/Gusat:Mitchell Mitchell Gusat], [http://www.ece.ubc.ca/~lemieux/ Guy Lemieux], [https://dblp.uni-trier.de/pers/hd/l/Loveless:K= K. Loveless], [http://my.ece.queensu.ca/people/N-Manjikian/index.html Naraig Manjikian], [https://www.linkedin.com/in/sinisasrbljic/ Sinisa Srbljic], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=67137 Michael Stumm], [[Zvonko Vranesic]], [[Zeljko Zilic]] ('''1998'''). ''[https://ieeexplore.ieee.org/document/724441/ Design and Implementation of the NUMAchine Multiprocessor]''. [https://dblp.uni-trier.de/db/conf/dac/dac98.html DAC 1998], [http://www.eecg.toronto.edu/parallel/parallel/docs/dac98.pdf pdf] <ref>[http://www.eecg.toronto.edu/parallel/parallel/numadocs.html Documentation on the NUMAchine Multiprocessor]</ref>
==2000 ...==
* [https://www.linkedin.com/in/robin-grindley-47550/ Robin Grindley], [http://www.eecg.toronto.edu/~tsa/ Tarek Abdelrahman], [http://www.eecg.toronto.edu/%7Ebrown/ Stephen Brown], [https://dblp.uni-trier.de/pers/hd/c/Caranci:S= Steve Caranci], [https://dblp.uni-trier.de/pers/hd/d/DeVries:D= D. DeVries], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=67177 Benjamin Gamsa], [https://www.linkedin.com/in/ante-grbi%C4%87-0657665b/ Ante Grbić], [https://dblp.uni-trier.de/pers/hd/g/Gusat:Mitchell Mitchell Gusat], [https://dblp.uni-trier.de/pers/hd/h/Ho:R= R. Ho], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=99397 Orran Krieger], [http://www.ece.ubc.ca/~lemieux/ Guy Lemieux], [https://dblp.uni-trier.de/pers/hd/l/Loveless:K= K. Loveless], [http://my.ece.queensu.ca/people/N-Manjikian/index.html Naraig Manjikian], [https://dblp.uni-trier.de/pers/hd/m/McHardy:P= P. McHardy], [https://www.linkedin.com/in/sinisasrbljic/ Sinisa Srbljic], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=67137 Michael Stumm], [[Zvonko Vranesic]], [[Zeljko Zilic]] ('''2000'''). ''The NUMAchine Multiprocessor''. [https://dblp.uni-trier.de/db/conf/icpp/icpp2000.html ICPP 2000], [http://www.eecg.toronto.edu/parallel/parallel/docs/icpp00.pdf pdf]
* [[Marc Boulé]], [[Zeljko Zilic]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. [[McGill University]]
* [[Marc Boulé]], [[Zeljko Zilic]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. [[ICGA Journal#25_2|ICGA Journal, Vol. 25, No. 2]]
* [[Marc Boulé]], [[Zeljko Zilic]] ('''2003'''). ''FPGA Hardware Acceleration: From Chess Playing to Automated Theorem Proving''. poster presentation, Micronet 2003
* [[Zeljko Zilic]] ('''2009'''). ''[https://www.semanticscholar.org/paper/Designing-and-Using-FPGAs-beyond-Classical-Binary-Zilic/c63e05fc673821d5dc8e471e2849105bc22526f6 Designing and Using FPGAs beyond Classical Binary Logic: Opportunities in Nano-Scale Integration Age]''. [https://dblp.uni-trier.de/db/conf/ismvl/ismvl2009.html ISMVL 2009]
==2010 ...==
* [https://dblp.uni-trier.de/pers/hd/t/Tong:Jason_G= Jason G. Tong], [[Marc Boulé]], [[Zeljko Zilic]] ('''2010'''). ''Defining and Providing Coverage for Assertion-Based Dynamic Verification''. [https://link.springer.com/journal/10836 Journal of Electronic Testing], Vol. 26
* [https://dblp.uni-trier.de/pers/hd/t/Tong:Jason_G= Jason G. Tong], [[Marc Boulé]], [[Zeljko Zilic]] ('''2016'''). ''Accelerating assertion assessment using GPUs''. [https://dblp.uni-trier.de/db/conf/hldvt/hldvt2016.html HLDVT 2016]
=External Links=
* [http://www.ece.mcgill.ca/~zzilic/ Zeljko Zilic MACS Page]
* [http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php Zilic, Z., Ph.D., P. Eng.] within Integrated Microsystems Laboratory of [[McGill University]]
=References=
<references />
'''[[People|Up one level]]'''
[[FILE:ZeljkoZilic.jpg|border|right|thumb|link=http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php| Zeljko Zilic <ref>[http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php Zilic, Z., Ph.D., P. Eng.] within Integrated Microsystems Laboratory of [[McGill University]]</ref> ]]
'''Zeljko Zilic''',<br/>
a [https://en.wikipedia.org/wiki/Croatian_Canadians Croatian Canadian] electrical engineer and computer scientist, and associate professor at [[McGill University]].
He holds a [https://en.wikipedia.org/wiki/Bachelor_of_Engineering B. Eng] from [https://en.wikipedia.org/wiki/University_of_Zagreb University of Zagreb] and received his Ph.D. and M.Sc. from the [[University of Toronto]]. His research interests covers [https://en.wikipedia.org/wiki/Logic_synthesis logic synthesis], testing, verification and debug [[FPGA]], [https://en.wikipedia.org/wiki/Embedded_system embedded], [https://en.wikipedia.org/wiki/Wireless wireless] and [https://en.wikipedia.org/wiki/Multiprocessing multiprocessor] systems as well as [https://en.wikipedia.org/wiki/Symbolic_computation algebraic], [https://en.wikipedia.org/wiki/Combinatorics combinatorial] and [https://en.wikipedia.org/wiki/Quantum_computer quantum algorithms] <ref>[http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php#interests Zilic, Z., Ph.D., P. Eng. - Research Interests]</ref>.
=Selected Publications=
<ref>[http://www.iml.ece.mcgill.ca/people/professors/zilic/publications.php Zeljko Zilic - Publications]</ref> <ref>[https://dblp.uni-trier.de/pers/hd/z/Zilic:Zeljko dblp: Zeljko Zilic]</ref>
==1990 ...==
* [[Zeljko Zilic]], [[Zvonko Vranesic]] ('''1993'''). ''[https://ieeexplore.ieee.org/document/289552/ Current-Mode CMOS Galois Field Circuits]''. [https://dblp.uni-trier.de/db/conf/ismvl/ismvl1993.html ISMVL 1993]
* [[Zeljko Zilic]], [[Zvonko Vranesic]] ('''1995'''). ''[https://ieeexplore.ieee.org/document/403717/ A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions]''. [[IEEE#TOC|IEEE Transactions on Computers]], Vol. 44, No. 8 <ref>[https://en.wikipedia.org/wiki/Reed%E2%80%93Muller_code Reed–Muller code from Wikipedia]</ref>
* [[Zeljko Zilic]], [[Zvonko Vranesic]] ('''1996'''). ''[https://www.computer.org/csdl/proceedings/fpga/1996/2576/00/25760024-abs.html Using BDDs to Design ULMs for FPGAs]''. [https://dblp.uni-trier.de/db/conf/fpga/fpga96.html FPGA 1996]
* [https://www.linkedin.com/in/ante-grbi%C4%87-0657665b/ Ante Grbić], [http://www.eecg.toronto.edu/%7Ebrown/ Stephen Brown], [https://dblp.uni-trier.de/pers/hd/c/Caranci:S= Steve Caranci], [https://www.linkedin.com/in/robin-grindley-47550/ Robin Grindley], [https://dblp.uni-trier.de/pers/hd/g/Gusat:Mitchell Mitchell Gusat], [http://www.ece.ubc.ca/~lemieux/ Guy Lemieux], [https://dblp.uni-trier.de/pers/hd/l/Loveless:K= K. Loveless], [http://my.ece.queensu.ca/people/N-Manjikian/index.html Naraig Manjikian], [https://www.linkedin.com/in/sinisasrbljic/ Sinisa Srbljic], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=67137 Michael Stumm], [[Zvonko Vranesic]], [[Zeljko Zilic]] ('''1998'''). ''[https://ieeexplore.ieee.org/document/724441/ Design and Implementation of the NUMAchine Multiprocessor]''. [https://dblp.uni-trier.de/db/conf/dac/dac98.html DAC 1998], [http://www.eecg.toronto.edu/parallel/parallel/docs/dac98.pdf pdf] <ref>[http://www.eecg.toronto.edu/parallel/parallel/numadocs.html Documentation on the NUMAchine Multiprocessor]</ref>
==2000 ...==
* [https://www.linkedin.com/in/robin-grindley-47550/ Robin Grindley], [http://www.eecg.toronto.edu/~tsa/ Tarek Abdelrahman], [http://www.eecg.toronto.edu/%7Ebrown/ Stephen Brown], [https://dblp.uni-trier.de/pers/hd/c/Caranci:S= Steve Caranci], [https://dblp.uni-trier.de/pers/hd/d/DeVries:D= D. DeVries], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=67177 Benjamin Gamsa], [https://www.linkedin.com/in/ante-grbi%C4%87-0657665b/ Ante Grbić], [https://dblp.uni-trier.de/pers/hd/g/Gusat:Mitchell Mitchell Gusat], [https://dblp.uni-trier.de/pers/hd/h/Ho:R= R. Ho], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=99397 Orran Krieger], [http://www.ece.ubc.ca/~lemieux/ Guy Lemieux], [https://dblp.uni-trier.de/pers/hd/l/Loveless:K= K. Loveless], [http://my.ece.queensu.ca/people/N-Manjikian/index.html Naraig Manjikian], [https://dblp.uni-trier.de/pers/hd/m/McHardy:P= P. McHardy], [https://www.linkedin.com/in/sinisasrbljic/ Sinisa Srbljic], [https://www.genealogy.math.ndsu.nodak.edu/id.php?id=67137 Michael Stumm], [[Zvonko Vranesic]], [[Zeljko Zilic]] ('''2000'''). ''The NUMAchine Multiprocessor''. [https://dblp.uni-trier.de/db/conf/icpp/icpp2000.html ICPP 2000], [http://www.eecg.toronto.edu/parallel/parallel/docs/icpp00.pdf pdf]
* [[Marc Boulé]], [[Zeljko Zilic]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. [[McGill University]]
* [[Marc Boulé]], [[Zeljko Zilic]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. [[ICGA Journal#25_2|ICGA Journal, Vol. 25, No. 2]]
* [[Marc Boulé]], [[Zeljko Zilic]] ('''2003'''). ''FPGA Hardware Acceleration: From Chess Playing to Automated Theorem Proving''. poster presentation, Micronet 2003
* [[Zeljko Zilic]] ('''2009'''). ''[https://www.semanticscholar.org/paper/Designing-and-Using-FPGAs-beyond-Classical-Binary-Zilic/c63e05fc673821d5dc8e471e2849105bc22526f6 Designing and Using FPGAs beyond Classical Binary Logic: Opportunities in Nano-Scale Integration Age]''. [https://dblp.uni-trier.de/db/conf/ismvl/ismvl2009.html ISMVL 2009]
==2010 ...==
* [https://dblp.uni-trier.de/pers/hd/t/Tong:Jason_G= Jason G. Tong], [[Marc Boulé]], [[Zeljko Zilic]] ('''2010'''). ''Defining and Providing Coverage for Assertion-Based Dynamic Verification''. [https://link.springer.com/journal/10836 Journal of Electronic Testing], Vol. 26
* [https://dblp.uni-trier.de/pers/hd/t/Tong:Jason_G= Jason G. Tong], [[Marc Boulé]], [[Zeljko Zilic]] ('''2016'''). ''Accelerating assertion assessment using GPUs''. [https://dblp.uni-trier.de/db/conf/hldvt/hldvt2016.html HLDVT 2016]
=External Links=
* [http://www.ece.mcgill.ca/~zzilic/ Zeljko Zilic MACS Page]
* [http://www.iml.ece.mcgill.ca/people/professors/zilic/index.php Zilic, Z., Ph.D., P. Eng.] within Integrated Microsystems Laboratory of [[McGill University]]
=References=
<references />
'''[[People|Up one level]]'''
