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→Intel
==General Purpose==
The 16 general purpose registers may be treated as 64 bit [[Quad Word]] ([[Bitboards|bitboard]]), 32 bit [[Double Word]], 16 bit [[Word]] and high(partly), low [[Byte]]<ref>[https://software.intel.com/en-us/articles/introduction-to-x64-assembly Introduction to x64 Assembly | Intel® Software]</ref>:
{| class="wikitable"
|-
| R08D
| R08W
| R08H - | R08L R08B
| GP
|-
| R..D
| R..W
| R..H -| R..L B
| GP
|-
| R15D
| R15W
| R15H - | R15L R15B
| GP
|}
* [https://en.wikipedia.org/wiki/Intel_C%2B%2B_Compiler Intel-C]
* [[Free Software Foundation#GCC|GCC]]
* [[Clang]]
=See also=
* [[asmFish]]
* [[AMX]] <ref>[https://en.wikichip.org/wiki/x86/amx Advanced Matrix Extension (AMX) - x86 - WikiChip]</ref>
* [[AVX]]
* [[AVX2]]
* [http://software.intel.com/file/36945 Intel-AVX-Programming-Reference] (pdf)
===Optimization Guides===
* [https://wwwsoftware.intel.com/content/dam/www/public/us/en/documentsdevelop/manualsdownload/intel-64-and-ia-32-architectures-optimization-reference-manual.pdf html Intel® 64 and IA-32 Architectures Optimization Reference Manual] (pdf) v
=Forum Posts=
==2003 ...==
* [https://www.stmintz.com/ccc/index.php?id=283740 IA-64 vs OOOE (attn Taylor, Hyatt)] by [[Tom Kerrigan]], [[CCC]], February 11, 2003 » [[Itanium]]
* [https://www.stmintz.com/ccc/index.php?id=410357 Opteron NUMA/SMP question] by Matthew Hull, [[CCC]], February 09, 2005 » [[NUMA]], [[SMP]]
* [http://www.talkchess.com/forum/viewtopic.php?t=26542 core2 popcnt] by [[Frank Phillips]], [[CCC]], February 13, 2009 » [[Population Count]]
==2010 ...==
* [http://www.talkchess.com/forum/viewtopic.php?t=45167 Ivy Bridge vs Sandy Bridge for computer chess] by [[Larry Kaufman]], [[CCC]], September 15, 2012
* [http://www.talkchess.com/forum/viewtopic.php?t=45707 What is your take on AMD's new processor?] by Tano-Urayoan Russi Roman, [[CCC]], October 24, 2012
* [http://www.talkchess.com/forum/viewtopic.php?t=51087 Intel i3 L2 cache] by [[Harm Geert Muller]], [[CCC]], January 28, 2014 » [[Memory]] <ref>[https://en.wikipedia.org/wiki/Intel_Core#Core_i3 Intel Nehalem Core i3]</ref>
* [http://www.talkchess.com/forum/viewtopic.php?t=51996 Core Port Saturation] by [[Natale Galioto]], [[CCC]], April 14, 2014
==2015 ...==
* [http://www.talkchess.com/forum/viewtopic.php?t=61559 syzygy users (and Ronald)] by [[Robert Hyatt]], [[CCC]], September 29, 2016 » [[BitScan]], [[Population Count]]
* [https://groups.google.com/d/msg/computer-go-archive/mXE2UsBDeyA/ljUckKn-AgAJ New AMD processors] by [[Ingo Althöfer]], [http://computer-go.org/pipermail/computer-go/ The Computer-go Archives], March 03, 2017
* [http://www.talkchess.com/forum/viewtopic.php?t=66737&start=4 Re: Komodo 11.3] by [[Mark Lefler]], [[CCC]], March 04, 2018 » [[AMD]], [[BMI2#PEXT|BMI2 PEXT]], [[Komodo#11|Komodo 11.3]]
* [http://www.talkchess.com/forum3/viewtopic.php?f=7&t=70283 Some x64 assembler for the curious] by [[Michael Sherwin]], [[CCC]], March 22, 2019 » [[Assembly]]
* [http://www.talkchess.com/forum3/viewtopic.php?f=2&t=72137 Ryzen problems - AGAIN!] by [[Bojun Guo|noobpwnftw]], [[CCC]], October 22, 2019
==2020 ...==
* [http://www.talkchess.com/forum3/viewtopic.php?f=7&t=74377 Intel AMX with TMUL on Xeon Sapphire Rapids (2021?)] by [[Srdja Matovic]], [[CCC]], July 05, 2020 » [[AMX]]
* [http://www.talkchess.com/forum3/viewtopic.php?f=2&t=76931 Can somebody compare the AMD Ryzen processors to the intel processors] by George Pichard, [[CCC]], March 24, 2021
=External Links=
==AMD==
* [https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures List of AMD CPU microarchitectures from Wikipedia]
* [https://en.wikipedia.org/wiki/AMD_K8 AMD K8 from Wikipedia]
** [https://en.wikipedia.org/wiki/Athlon_64 Athlon 64]
* [https://en.wikipedia.org/wiki/Excavator_%28microarchitecture%29 Excavator (microarchitecture) from Wikipedia]
* [https://en.wikipedia.org/wiki/Zen_(microarchitecture) Zen (microarchitecture) from Wikipedia]
* [https://en.wikipedia.org/wiki/Zen_(first_generation_microarchitecture) Zen (first generation microarchitecture) from Wikipedia]
* [https://en.wikipedia.org/wiki/Zen%2B Zen+ from Wikipedia]
* [https://en.wikipedia.org/wiki/Zen_2 Zen 2 from Wikipedia]
* [https://en.wikipedia.org/wiki/Zen_3 Zen 3 from Wikipedia]
* [https://en.wikipedia.org/wiki/Zen_4 Zen 4 from Wikipedia]
==Intel==
* [https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures List of Intel CPU microarchitectures from Wikipedia]
* [https://en.wikipedia.org/wiki/X86-64#Intel_64 EMT64 from Wikipedia]
* [https://en.wikipedia.org/wiki/Tick-Tock_model Tick-Tock model from Wikipedia]
* [https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions Transactional Synchronization Extensions (TSX) from Wikipedia] ([https://en.wikipedia.org/wiki/Haswell_%28microarchitecture%29 Haswell])
* [http://software.intel.com/sites/landingpage/IntrinsicsGuide/ Intel Intrinsics Guide]
* [https://en.wikichip.org/wiki/x86/amx Advanced Matrix Extension (AMX) - x86 - WikiChip]
* [https://en.wikipedia.org/wiki/Bit_manipulation_instruction_set Bit manipulation instruction set from Wikipedia]
==Security Vulnerability==
