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RAM is organized in three banks, 0, 1 and 15 of 256 nibbles each. The lowest 32 nibbles of bank 0 (000H–01FH) are used as working [https://en.wikipedia.org/wiki/Processor_register registers],
the remaining 224 nibbles can be used both as [https://en.wikipedia.org/wiki/Call_stack stack area] and as general-purpose data memory, bank 1 for general-purpose use and bank 15 for [https://en.wikipedia.org/wiki/Memory-mapped_I/O memory-mapped I/O].
There are multiple [https://en.wikipedia.org/wiki/Addressing_mode addressing modes], a 8-bit mode requires a an even nibble address inside a pair of 4-bit registers.
The register area is divided into four register banks 0 to 3 selected by the register bank selection instruction (SRB n), bank 0 for the main program, 1-3 for interrupt routines.
Each of the register banks is subdivided into eight 4-bit registers A (lsn), E, L, H, X, W, Z, Y (msn) with EA, HL, WX, YZ as possible register pairs, as well as the cross mapped WL.
