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Mini Chess

55 bytes removed, 13:22, 7 June 2020
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'''Mini Chess''', (SciSys Mini Chess)<br/>
along with [[#Junior|Junior Chess]] and [[#Graduate|Graduate Chess]], a series of portable [[Dedicated Chess Computers|dedicated chess computers]] manufactured and sold by [[Saitek|SciSys]], first released in early 1981. The computers had a [https://en.wikipedia.org/wiki/Hitachi_Ltd. Hitachi] '''[[HMCS4xC|HD44801''' ]] 4-bit [https://en.wikipedia.org/wiki/CMOS CMOS] [https://en.wikipedia.org/wiki/Microcontroller microcontroller] with 2 kibi 2K of 10-bit word [[Memory#ROM|ROM]], 128 10-bit words of pattern ROM supported by pattern generation instructions with table lookup capability, and '''160''' [[Nibble|nibbles]] or digits (80 [[Byte|bytes]]) of [[Memory#RAM|RAM]] <ref>[http://www.ic-on-line.cn/view_download.php?id=1100207&file=0052%5Chd44801_398306.pdf HD44801_398306.PDF Datasheet Download --- IC-ON-LINE]</ref>, running at 400 KHz. The programs were delivered by [[Philidor Software]], developed by [[Mark Taylor]] under guidance of [[David Levy]], who contributed the basic chess algorithm <ref>[http://www.schach-computer.info/wiki/index.php/Levy,_David David Levy interview] from [http://www.schach-computer.info/wiki/index.php/Hauptseite_En Schachcomputer.info - Wiki]</ref> including [[Promotions|promotions]], [[En passant|en passant]], and [[Castling|castling]], and even managed [[Checkmate|mate]] with KR v K in some versions all in astonishing 160 nibbles of RAM. A piece of work that Mark Taylor is still rightly proud of today <ref>[http://www.chesscomputeruk.com/html/chess_computers_-_the_uk_story.html Chess Computers - The UK Story] from [http://www.chesscomputeruk.com/index.html Chess Computer UK] by [[Mike Watters]]</ref>.
=160 Nibble Challenge=
'''[[Engines|Up one Level]]'''
[[Category:HMCS4xC]]
[[Category:Commercial]]
[[Category:Dedicated]]
[[Category:Chess Suffix]]

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