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Hydra

1 byte added, 16:58, 17 October 2018
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: With the help of the FPGA technology, the boarder between hard- and software has vanished. It is now possible to develop complex designs and fine grained parallel applications without the long-lasting chip design cycles. Additionally, it has become easier to write coarse grained parallel applications with the help of message passing libraries like MPI. The chess program Hydra is a high level hardware-software co-design application which profits from both worlds. We describe the design philosophy, general architecture and performance of Hydra. The time critical part of the search tree, near the leaves, is explored with the help of fine grain parallelism of FPGA cards. For nodes near the root, the search algorithm runs distributed on a cluster of conventional processors. A nice detail is that the FPGA cards allow the implementation of sophisticated chess knowledge without decreasing the computational speed.
* [[Carl Bicknell]] ('''2004'''). ''Interview with Chrilly Donninger, Subject: Hydra''. [[Selective Search]] 113, pp. 19, [http://www.chesscomputeruk.com/SS_113.pdf pdf] hosted by [[Mike Watters]]
* [[Chrilly Donninger]], [[Ulf Lorenz]] ('''2005'''). ''The Hydra project''. Xcell Journal, Issue 53, pp. 94–97,[https://www.xilinx.com/publications/archives/xcell/Xcell53.pdf pdf]
* [[ChessBase]], the Editor, [[John Nunn]], [[David Levy]] ('''2005'''). ''Adams Outclassed by HYDRA''. [[ICGA Journal#28_2|ICGA Journal, Vol. 28, No. 2]]
* [[David Levy]] ('''2005'''). ''Man vs. Machine – What Next?'' [[ICGA Journal#28_2|ICGA Journal, Vol. 28, No. 2]]

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