Difference between revisions of "Hardware"

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(Created page with "'''Home * Hardware''' =Basics= * Combinatorial Logic * Memory * Sequential Logic * Von Neumann architecture =Special Purpose Hardware= ==Dedi...")
 
 
(13 intermediate revisions by the same user not shown)
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* [[Memory]]
 
* [[Memory]]
 
* [[Sequential Logic]]
 
* [[Sequential Logic]]
* [[Von Neumann architecture]]
+
* [[Von Neumann Architecture]]
  
 
=Special Purpose Hardware=  
 
=Special Purpose Hardware=  
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===Amdahl===
 
===Amdahl===
 
* [[Amdahl 470]]
 
* [[Amdahl 470]]
 +
===Burroughs===
 +
* [[Burroughs B-5500]]
 
===CDC===
 
===CDC===
 +
* [[CDC 1604]]
 
* [[CDC 6600]]
 
* [[CDC 6600]]
 
* [[CDC Cyber]]
 
* [[CDC Cyber]]
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* [[UNIVAC 494]]
 
* [[UNIVAC 494]]
 
* [[UNIVAC 1100]]
 
* [[UNIVAC 1100]]
===Massively Parallel===
+
 
 +
==Parallel==
 
* [[Connection Machine]]
 
* [[Connection Machine]]
 
* [[nCUBE]]
 
* [[nCUBE]]
 
* [[Paragon]]
 
* [[Paragon]]
 +
* [[Transputer]]
 +
* [[GPU]]
 +
* [[M1]] by [[Apple]]
 +
 
==Minis & Workstations==  
 
==Minis & Workstations==  
 
* [[HP 2100]]
 
* [[HP 2100]]
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* [[Arduino]]
 
* [[Arduino]]
 
* [[KIM-1]]
 
* [[KIM-1]]
* [[pcDuino]]
 
 
* [[Raspberry Pi]]
 
* [[Raspberry Pi]]
 
* [[UDOO]]
 
* [[UDOO]]
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: [[Commodore 128]]
 
: [[Commodore 128]]
 
: [[Amiga]]
 
: [[Amiga]]
* [[Gigatron]]
 
 
* [[IBM PC]]
 
* [[IBM PC]]
 
* [[Sinclair ZX81]]
 
* [[Sinclair ZX81]]
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=µ-Processors & Controller=  
 
=µ-Processors & Controller=  
 
* [[PIC Microcontroller]]
 
* [[PIC Microcontroller]]
 +
==4-bit==
 +
* [[HMCS4xC]]
 +
* [[SAM]]
 
==8-bit==  
 
==8-bit==  
 
* [[Fairchild F8]]
 
* [[Fairchild F8]]
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* [[6809]] by [[Motorola]]
 
* [[6809]] by [[Motorola]]
 
==32-bit==  
 
==32-bit==  
* [[x86]] by [[Intel]] and [[AMD]]
 
 
* [[68000]] by [[Motorola]] (external 16 bit databus)
 
* [[68000]] by [[Motorola]] (external 16 bit databus)
 
* [[68020]] by [[Motorola]]
 
* [[68020]] by [[Motorola]]
 
* [[68030]] by [[Motorola]]
 
* [[68030]] by [[Motorola]]
 
* [[ARM2]] by [[Acorn Computers Ltd]]
 
* [[ARM2]] by [[Acorn Computers Ltd]]
* [[ARM6]] by [[ARM Ltd|Advanced RISC Machines Ltd]]
+
* [[ARM6]] by [[ARM|Advanced RISC Machines Ltd]]
* [[ARM11]] by [[ARM Ltd|Advanced RISC Machines Ltd]]
+
* [[ARM11]] by [[ARM|Advanced RISC Machines Ltd]]
 +
* [[ARMv7]]
 
* [[PowerPC]] by [[Apple]], [[IBM]] and [[Motorola]]
 
* [[PowerPC]] by [[Apple]], [[IBM]] and [[Motorola]]
 
* [[SPARC|SPARC V7/V8]] by [[Sun Microsystems]]
 
* [[SPARC|SPARC V7/V8]] by [[Sun Microsystems]]
==Transputer==
+
* [[x86]] by [[Intel]] and [[AMD]]
* [[Transputer|T800]] by [https://en.wikipedia.org/wiki/Inmos Inmos]
 
 
==64-bit==  
 
==64-bit==  
 +
* [[ARMv8]]
 
* [[DEC Alpha]] by [[Digital Equipment Corporation]]
 
* [[DEC Alpha]] by [[Digital Equipment Corporation]]
 
* [[i860]] by [[Intel]]
 
* [[i860]] by [[Intel]]
 
* [[Itanium]] by [[Intel]]
 
* [[Itanium]] by [[Intel]]
* [[x86-64]] or x64 by [[AMD]] and [[Intel]]
 
 
* [[PowerPC|PowerPC 620]] by [[Apple]], [[IBM]] and [[Motorola]]
 
* [[PowerPC|PowerPC 620]] by [[Apple]], [[IBM]] and [[Motorola]]
 
* [[PowerPC#G5|PowerPC G5]] by [[IBM]]
 
* [[PowerPC#G5|PowerPC G5]] by [[IBM]]
 
* [[SPARC#V9|SPARC V9]] by [[Sun Microsystems]]
 
* [[SPARC#V9|SPARC V9]] by [[Sun Microsystems]]
 +
* [[x86-64]] or x64 by [[AMD]] and [[Intel]]
  
 
=Misc=  
 
=Misc=  
* [[GPU]]
 
 
* [[Sensory Board]]
 
* [[Sensory Board]]
  
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* [[Joe Condon]], [[Ken Thompson]] ('''1982'''). ''Belle Chess Hardware''. [[Advances in Computer Chess 3]], Reprinted ('''1988''') in [[Computer Chess Compendium]] » [[Belle]]
 
* [[Joe Condon]], [[Ken Thompson]] ('''1982'''). ''Belle Chess Hardware''. [[Advances in Computer Chess 3]], Reprinted ('''1988''') in [[Computer Chess Compendium]] » [[Belle]]
 
* [[Carl Ebeling]], [[Andrew James Palay]] ('''1984'''). ''The Design and Implementation of a VLSI Chess Move Generator''. Proceedings of the 11th Annual International Symposium on Computer Architecture. [[IEEE]] and [[ACM]].
 
* [[Carl Ebeling]], [[Andrew James Palay]] ('''1984'''). ''The Design and Implementation of a VLSI Chess Move Generator''. Proceedings of the 11th Annual International Symposium on Computer Architecture. [[IEEE]] and [[ACM]].
* [[Carl Ebeling]] ('''1986'''). ''[http://mitpress.mit.edu/catalog/item/default.asp?ttype=2&tid=7692 All the Right Moves: A VLSI Architecture for Chess]''. Ph.D. thesis, [[Carnegie Mellon University]], [https://en.wikipedia.org/wiki/MIT_Press MIT Press], ISBN 0-262-05035-8, [http://www.amazon.com/All-Right-Moves-Architecture-Distinguished/dp/0262050358 amazon.com] <ref>[http://www.talkchess.com/forum/viewtopic.php?t=41743 Any opinion about this book?: "All the Right Moves"] by E Diaz, [[CCC]], January 02, 2012</ref> » [[HiTech]]
+
* [[Carl Ebeling]] ('''1986'''). ''All the Right Moves: A VLSI Architecture for Chess''. Ph.D. thesis, [[Carnegie Mellon University]], [https://en.wikipedia.org/wiki/MIT_Press MIT Press] <ref>[http://www.talkchess.com/forum/viewtopic.php?t=41743 Any opinion about this book?: "All the Right Moves"] by E Diaz, [[CCC]], January 02, 2012</ref> » [[HiTech]]
* [[Feng-hsiung Hsu]] ('''1986'''). ''[http://repository.cmu.edu/compsci/1566/ Two designs of functional units for VLSI based chess machines]''. [[Carnegie Mellon University]], Computer Science Department. Paper 1566. » [[ChipTest]]
+
* [[Feng-hsiung Hsu]] ('''1986'''). ''[http://repository.cmu.edu/compsci/1566/ Two designs of functional units for VLSI based chess machines]''. [[Carnegie Mellon University]], Computer Science Department. Paper 1566.
* [[Feng-hsiung Hsu]] ('''1987'''). ''A Two-Million Moves/Sec CMOS Single-Chip Chess Move Generator''. IEEE J. of Solid-state Circuits, Vol. 22, No. 5, pp. 841-846.
+
* [[Feng-hsiung Hsu]] ('''1987'''). ''A Two-Million Moves/Sec CMOS Single-Chip Chess Move Generator''. [[IEEE#JSSC|IEEE Journal of Solid-state Circuits]], Vol. 22, No. 5
 
==1990 ...==  
 
==1990 ...==  
* [[James Testa]], [[Alvin M. Despain]] ('''1990'''). ''[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=124744&contentType=Conference+Publications&searchWithin%3Dp_Authors%3A.QT.Testa%2C+J..QT. A CMOS VLSI chess microprocessor]''. [[University of California, Berkeley]], [[IEEE]] Custom Integrated Circuit Conference
+
* [[James Testa]], [[Alvin M. Despain]] ('''1990'''). ''A CMOS VLSI chess microprocessor'. [[University of California, Berkeley]], [[IEEE#CICC|Custom Integrated Circuit Conference]]
* [[Feng-hsiung Hsu]], [[Murray Campbell]], [[Joe Hoane]] ('''1995'''). ''Deep Blue System Overview''. International Conference on Supercomputing, 1995: 240-244 » [[Deep Blue]]
+
* [[Feng-hsiung Hsu]], [[Murray Campbell]], [[Joe Hoane]] ('''1995'''). ''Deep Blue System Overview''. International Conference on Supercomputing » [[Deep Blue]]
 
* [[Yi-Fan Ke]] ('''1996'''). ''A parallel hardware architecture for accelerating computer chess system-平行電腦象棋系統架構之設計及研究''. Ph.D. thesis, [[National Taiwan University]]
 
* [[Yi-Fan Ke]] ('''1996'''). ''A parallel hardware architecture for accelerating computer chess system-平行電腦象棋系統架構之設計及研究''. Ph.D. thesis, [[National Taiwan University]]
 
* [[Yi-Fan Ke]], [[Tai-Ming Parng]] ('''1996'''). ''A Parallel Hardware Architecture for Accelerating α-β Game Tree''. [http://search.ieice.org/bin/index.php?category=D&lang=E&curr=1 IEICE Transactions on Information and Systems], September, 1996, pp. 1232-1240
 
* [[Yi-Fan Ke]], [[Tai-Ming Parng]] ('''1996'''). ''A Parallel Hardware Architecture for Accelerating α-β Game Tree''. [http://search.ieice.org/bin/index.php?category=D&lang=E&curr=1 IEICE Transactions on Information and Systems], September, 1996, pp. 1232-1240
* [[Feng-hsiung Hsu]] ('''1999'''). ''IBM’s Deep Blue Chess Grandmaster Chips''. IEEE Micro, Vol. 19, No. 2 (Mar-Apr), pp. 70-81. ISSN 0272-1732. [http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.126.5392&rep=rep1&type=pdf pdf]
+
* [[Feng-hsiung Hsu]] ('''1999'''). ''IBM’s Deep Blue Chess Grandmaster Chips''. [[IEEE#Micro|IEEE Micro]], Vol. 19, No. 2, [http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.126.5392&rep=rep1&type=pdf pdf]
 
==2000 ...==  
 
==2000 ...==  
 
* [[Marc Boulé]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. Masters thesis, [[McGill University]], (Supervisor: [[Zeljko Zilic]], Co-Supervisor: [[Monroe Newborn|Monty Newborn]]), [http://www.iml.ece.mcgill.ca/%7Emboule/files/mbthesis02.pdf pdf]
 
* [[Marc Boulé]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. Masters thesis, [[McGill University]], (Supervisor: [[Zeljko Zilic]], Co-Supervisor: [[Monroe Newborn|Monty Newborn]]), [http://www.iml.ece.mcgill.ca/%7Emboule/files/mbthesis02.pdf pdf]
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=Forum Posts=  
 
=Forum Posts=  
 +
==2000 ...==
 
* [https://www.stmintz.com/ccc/index.php?id=286891 Computer chess and processor speed in 20 years from now...] by Chris, [[CCC]], February 26, 2003
 
* [https://www.stmintz.com/ccc/index.php?id=286891 Computer chess and processor speed in 20 years from now...] by Chris, [[CCC]], February 26, 2003
 +
* [http://www.talkchess.com/forum3/viewtopic.php?f=2&t=29169 A question about the best hardware for chess today] by [[Uri Blass]], [[CCC]], July 30, 2009
 +
==2010 ...==
 
* [http://www.talkchess.com/forum/viewtopic.php?t=36031 hardware advances - a different perspective] by [[Robert Hyatt]], [[CCC]], September 09, 2010
 
* [http://www.talkchess.com/forum/viewtopic.php?t=36031 hardware advances - a different perspective] by [[Robert Hyatt]], [[CCC]], September 09, 2010
 
* [http://www.talkchess.com/forum/viewtopic.php?t=36040 old crafty vs new crafty on new hardware] by [[Robert Hyatt]], [[CCC]], September 11, 2010 » [[Knowledge]], [[Crafty]]
 
* [http://www.talkchess.com/forum/viewtopic.php?t=36040 old crafty vs new crafty on new hardware] by [[Robert Hyatt]], [[CCC]], September 11, 2010 » [[Knowledge]], [[Crafty]]
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* [http://www.talkchess.com/forum/viewtopic.php?t=50937 Good question: What % improvement is hardware vs. software?] by Jonathan Lee, [[CCC]], January 17, 2014
 
* [http://www.talkchess.com/forum/viewtopic.php?t=50937 Good question: What % improvement is hardware vs. software?] by Jonathan Lee, [[CCC]], January 17, 2014
 
* [http://www.talkchess.com/forum/viewtopic.php?t=59530 Moore's Law] by [[Mark Lefler]], [[CCC]], March 16, 2016 <ref>[https://en.wikipedia.org/wiki/Moore's_law Moore's law from Wikipedia]</ref> <ref>[http://www.economist.com/technology-quarterly/2016-03-12/after-moores-law After Moore's law | Technology Quarterly] | [https://en.wikipedia.org/wiki/The_Economist The Economist], March 12, 2016</ref>
 
* [http://www.talkchess.com/forum/viewtopic.php?t=59530 Moore's Law] by [[Mark Lefler]], [[CCC]], March 16, 2016 <ref>[https://en.wikipedia.org/wiki/Moore's_law Moore's law from Wikipedia]</ref> <ref>[http://www.economist.com/technology-quarterly/2016-03-12/after-moores-law After Moore's law | Technology Quarterly] | [https://en.wikipedia.org/wiki/The_Economist The Economist], March 12, 2016</ref>
* [http://www.talkchess.com/forum/viewtopic.php?t=65905 The Gigatron project] by [[Harm Geert Muller]], [[CCC]], December 06, 2017 » [[Gigatron]]  
+
* [http://www.talkchess.com/forum/viewtopic.php?t=65905 The Gigatron project] by [[Harm Geert Muller]], [[CCC]], December 06, 2017 » [[#Gigatron|Gigatron]]  
  
 
=External Links=  
 
=External Links=  
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* [https://en.wikipedia.org/wiki/Moore's_law Moore's law from Wikipedia]
 
* [https://en.wikipedia.org/wiki/Moore's_law Moore's law from Wikipedia]
 
* [http://www.economist.com/technology-quarterly/2016-03-12/after-moores-law After Moore's law | Technology Quarterly] | [https://en.wikipedia.org/wiki/The_Economist The Economist], March 12, 2016 <ref>[http://www.talkchess.com/forum/viewtopic.php?t=59530 Moore's Law] by [[Mark Lefler]], [[CCC]], March 16, 2016</ref>
 
* [http://www.economist.com/technology-quarterly/2016-03-12/after-moores-law After Moore's law | Technology Quarterly] | [https://en.wikipedia.org/wiki/The_Economist The Economist], March 12, 2016 <ref>[http://www.talkchess.com/forum/viewtopic.php?t=59530 Moore's Law] by [[Mark Lefler]], [[CCC]], March 16, 2016</ref>
* [https://hackaday.io/project/20781-8-bit-color-computer-from-ttl 8-bit color computer from TTL] by [[Marcel van Kervinck]], [https://en.wikipedia.org/wiki/Hackaday Hackaday.io], 2017 » [[Gigatron]] <ref>[http://www.talkchess.com/forum/viewtopic.php?t=65905 The Gigatron project] by [[Harm Geert Muller]], [[CCC]], December 06, 2017</ref>
+
* <span id="Gigatron"></span>[https://en.wikipedia.org/wiki/Gigatron_TTL Gigatro TTL from Wikipedia] <ref>[https://hackaday.io/project/20781-8-bit-color-computer-from-ttl 8-bit color computer from TTL] by [[Marcel van Kervinck]], [https://en.wikipedia.org/wiki/Hackaday Hackaday.io], 2017</ref> <ref>[https://gigatron.io/?page_id=17 About – Gigatron]</ref>
  
 
=References=  
 
=References=  
 
<references />
 
<references />
 
 
'''[[Main Page|Up one Level]]'''
 
'''[[Main Page|Up one Level]]'''

Latest revision as of 18:52, 12 July 2021

Home * Hardware

Basics

Special Purpose Hardware

Dedicated Chess Hardware

Programmable Logics

  • PAL - Programmable array logic
  • GAL - Generic array logic
  • CPLD - Complex programmable Logic Device
  • FPGA - Field-programmable gate array

Famous Chess Machines

General Purpose Hardware

Historic Computers

Mainframes

Amdahl

Burroughs

CDC

Cray

Honeywell

IBM

ICL ...

PDP

Siemens/Fujitsu

TR

UNIVAC

Parallel

Minis & Workstations

Single Board Computers

Home Computers

Home- and Personal Computers

Acorn Atom
BBC Micro
Acorn Archimedes
Apple II
Macintosh
Atari ST
Commodore VIC-20
Commodore 64
Commodore 128
Amiga
ZX Spectrum

Mobile Computers

from Wikipedia

Palm

µ-Processors & Controller

4-bit

8-bit

16-bit

32-bit

64-bit

Misc

Publications

1960 ...

1970 ...

1980 ...

1990 ...

2000 ...

Forum Posts

2000 ...

2010 ...

External Links

References

Up one Level