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* [[Memory]]
* [[Sequential Logic]]
* [[Von Neumann architectureArchitecture]]
=Special Purpose Hardware=
* [[Amdahl 470]]
===CDC===
* [[CDC 1604]]
* [[CDC 6600]]
* [[CDC Cyber]]
* [[Arduino]]
* [[KIM-1]]
* [[Raspberry Pi]]
* [[UDOO]]
* [[Joe Condon]], [[Ken Thompson]] ('''1982'''). ''Belle Chess Hardware''. [[Advances in Computer Chess 3]], Reprinted ('''1988''') in [[Computer Chess Compendium]] » [[Belle]]
* [[Carl Ebeling]], [[Andrew James Palay]] ('''1984'''). ''The Design and Implementation of a VLSI Chess Move Generator''. Proceedings of the 11th Annual International Symposium on Computer Architecture. [[IEEE]] and [[ACM]].
* [[Carl Ebeling]] ('''1986'''). ''[http://mitpress.mit.edu/catalog/item/default.asp?ttype=2&tid=7692 All the Right Moves: A VLSI Architecture for Chess]''. Ph.D. thesis, [[Carnegie Mellon University]], [https://en.wikipedia.org/wiki/MIT_Press MIT Press], ISBN 0-262-05035-8, [http://www.amazon.com/All-Right-Moves-Architecture-Distinguished/dp/0262050358 amazon.com] <ref>[http://www.talkchess.com/forum/viewtopic.php?t=41743 Any opinion about this book?: "All the Right Moves"] by E Diaz, [[CCC]], January 02, 2012</ref> » [[HiTech]]* [[Feng-hsiung Hsu]] ('''1986'''). ''[http://repository.cmu.edu/compsci/1566/ Two designs of functional units for VLSI based chess machines]''. [[Carnegie Mellon University]], Computer Science Department. Paper 1566. » [[ChipTest]]* [[Feng-hsiung Hsu]] ('''1987'''). ''A Two-Million Moves/Sec CMOS Single-Chip Chess Move Generator''. [[IEEE#JSSC|IEEE J. Journal of Solid-state Circuits]], Vol. 22, No. 5, pp. 841-846.
==1990 ...==
* [[James Testa]], [[Alvin M. Despain]] ('''1990'''). ''[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=124744&contentType=Conference+Publications&searchWithin%3Dp_Authors%3A.QT.Testa%2C+J..QT. A CMOS VLSI chess microprocessor]''. [[University of California, Berkeley]], [[IEEE]] #CICC|Custom Integrated Circuit Conference]]* [[Feng-hsiung Hsu]], [[Murray Campbell]], [[Joe Hoane]] ('''1995'''). ''Deep Blue System Overview''. International Conference on Supercomputing, 1995: 240-244 » [[Deep Blue]]
* [[Yi-Fan Ke]] ('''1996'''). ''A parallel hardware architecture for accelerating computer chess system-平行電腦象棋系統架構之設計及研究''. Ph.D. thesis, [[National Taiwan University]]
* [[Yi-Fan Ke]], [[Tai-Ming Parng]] ('''1996'''). ''A Parallel Hardware Architecture for Accelerating α-β Game Tree''. [http://search.ieice.org/bin/index.php?category=D&lang=E&curr=1 IEICE Transactions on Information and Systems], September, 1996, pp. 1232-1240
* [[Feng-hsiung Hsu]] ('''1999'''). ''IBM’s Deep Blue Chess Grandmaster Chips''. [[IEEE #Micro|IEEE Micro]], Vol. 19, No. 2 (Mar-Apr), pp. 70-81. ISSN 0272-1732. [http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.126.5392&rep=rep1&type=pdf pdf]
==2000 ...==
* [[Marc Boulé]] ('''2002'''). ''An FPGA Move Generator for the Game of Chess''. Masters thesis, [[McGill University]], (Supervisor: [[Zeljko Zilic]], Co-Supervisor: [[Monroe Newborn|Monty Newborn]]), [http://www.iml.ece.mcgill.ca/%7Emboule/files/mbthesis02.pdf pdf]
=Forum Posts=
==2000 ...==
* [https://www.stmintz.com/ccc/index.php?id=286891 Computer chess and processor speed in 20 years from now...] by Chris, [[CCC]], February 26, 2003
* [http://www.talkchess.com/forum3/viewtopic.php?f=2&t=29169 A question about the best hardware for chess today] by [[Uri Blass]], [[CCC]], July 30, 2009
==2010 ...==
* [http://www.talkchess.com/forum/viewtopic.php?t=36031 hardware advances - a different perspective] by [[Robert Hyatt]], [[CCC]], September 09, 2010
* [http://www.talkchess.com/forum/viewtopic.php?t=36040 old crafty vs new crafty on new hardware] by [[Robert Hyatt]], [[CCC]], September 11, 2010 » [[Knowledge]], [[Crafty]]
