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Fairchild F8

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==Instructions==
Arithmetical and logical [https://en.wikipedia.org/wiki/Instruction_set instructions] work on the accumulator. Source operands are either implicit, content of scratchpad register, indirect addressed via [https://en.wikipedia.org/wiki/Increment_and_decrement_operators post-incremented] data counter (DC) register, or immediate <ref>[http://bitsavers.informatik.uni-stuttgart.de/pdf/fairchild/f8/F8_prelimUM_Jan75.pdf F8 Prelimanary Microprocessor User's Manual] (pdf) Circuit Organization, Machine Instructions, F8 Cross Assembler, F8 Cross Simulator, from [http://bitsavers.informatik.uni-stuttgart.de/ bitsavers.org]</ref> :
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==Sample Assembly==
A answer back program in F8 [[Assembly]] as given by David Edwards, [https://en.wikipedia.org/wiki/Electronics_Australia Electronics Australia] <ref>David Edwards ('''1976'''). ''The Mostek F8''. [https://en.wikipedia.org/wiki/Electronics_Australia Electronics Australia], December, 1976, [http://messui.the-chronicles.org/comp/fairchild.pdf pdf]</ref> :
<pre>
ANSWER-BACK PROGRAM FOR MOSTEK F8 EVALUATION KIT
=F8 Chess Computers=
The original [[CompuChess]] <ref>[http://www.schach-computer.info/wiki/index.php/CompuChess CompuChess] from [http://www.schach-computer.info/wiki/index.php/Hauptseite_En Schachcomputer.info - Wiki] by [[Mike Watters]]</ref> and its [[Clones:Category:Clone|clone]], the [[Novag]] [[Chess Champion MK I]] had the '''3850''' CPU and the '''3853''' SMI, addressing a 2 KiB 2316 compatible ROM, and 2 x 2111 <ref>[http://pdf1.alldatasheet.com/datasheet-pdf/view/125751/NSC/MM2111.html MM2111 pdf, MM2111 description, MM2111 datasheets, MM2111 view]</ref> 256x4 each, in total 256 byte SRAM <ref>[http://www.schach-computer.info/wiki/index.php/Novag_Chess_Champion_MK_I Novag Chess Champion MK I] from [http://www.schach-computer.info/wiki/index.php/Hauptseite_En Schachcomputer.info - Wiki] (German)</ref> . [[Boris]] also used the 3850/3853 approach with 2 x 2112 for 256 byte SRAM, and 2 x 2 KiB ROM <ref>[http://alain.zanchetta.free.fr/docs/AppliedConcepts/BorisKitAssemblyManualUS.pdf Boris assembly manual] (pdf) hosted by [[Alain Zanchetta]]</ref> . [[David Kittinger]] had to solve the 128 byte challenge (including scratchpad) for the [[Novag Micro Chess]] with [https://en.wikipedia.org/wiki/Mostek#Microprocessor_second_sourcing_deals Mostek 3870].* [[Boris:Category:F8|Category:F8]]* [[Chess Champion MK I]]* [[Chess Champion Pocket Chess]] =Publications=* [[Chess Partner 2000https://en.wikipedia.org/wiki/Fairchild_Semiconductor Fairchild]]* ('''1977'''). ''[[CompuChesshttps://archive.org/details/bitsavers_fairchildfng1977_5888299 F8 Guide To Programming]]* ''. hosted by the [[Novag Micro Chess]]* [[SABA Videoplay 20]https://en.wikipedia.org/wiki/Internet_Archive Internet Archive]
=External Links=

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