Difference between revisions of "Burroughs B-5500"

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'''Burroughs B-5500''', (B5000, B5500, B7800)<br/>
 
'''Burroughs B-5500''', (B5000, B5500, B7800)<br/>
 
the second member of [https://en.wikipedia.org/wiki/Burroughs_large_systems Burroughs large systems] in 1964, with a 3 times speed improvement of the initial '''B-5000''' of 1961 which was designed by chief architect [[Mathematician#RSBarton|Robert S. Barton]], a unique machine using [https://en.wikipedia.org/wiki/Electronic_component discrete transistor logic] and [[Memory#Core|magnetic core memory]], well ahead of its time.
 
the second member of [https://en.wikipedia.org/wiki/Burroughs_large_systems Burroughs large systems] in 1964, with a 3 times speed improvement of the initial '''B-5000''' of 1961 which was designed by chief architect [[Mathematician#RSBarton|Robert S. Barton]], a unique machine using [https://en.wikipedia.org/wiki/Electronic_component discrete transistor logic] and [[Memory#Core|magnetic core memory]], well ahead of its time.
The B-5000 family were [https://en.wikipedia.org/wiki/Stack_machine stack machines] with [https://en.wikipedia.org/wiki/Multiprocessing multitasking] facilities, all code automatically [https://en.wikipedia.org/wiki/Reentrancy_(computing) reentrant].
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The B-5000 family were [https://en.wikipedia.org/wiki/48-bit_computing 48-bit] [https://en.wikipedia.org/wiki/Stack_machine stack machines] with [https://en.wikipedia.org/wiki/Multiprocessing multitasking] facilities, all code automatically [https://en.wikipedia.org/wiki/Reentrancy_(computing) reentrant].
They were a partially data-driven [https://en.wikipedia.org/wiki/Tagged_architecture tagged] and [https://en.wikipedia.org/wiki/Burroughs_large_systems_descriptors descriptor-based] design, supporting exclusively high-level [[Languages|programming languages]].
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They used a partially data-driven [https://en.wikipedia.org/wiki/Tagged_architecture tagged] and [https://en.wikipedia.org/wiki/Burroughs_large_systems_descriptors descriptor-based] design, supporting exclusively high-level [[Languages|programming languages]].
 
The [[Algol|ALGOL 60]] dialect chosen for the B-5000 was [https://en.wikipedia.org/wiki/Elliott_ALGOL Elliott ALGOL], first designed and implemented by [[Mathematician#CARHoare|C.A.R. Hoare]] on an [https://en.wikipedia.org/wiki/Elliott_803 Elliott 503].  
 
The [[Algol|ALGOL 60]] dialect chosen for the B-5000 was [https://en.wikipedia.org/wiki/Elliott_ALGOL Elliott ALGOL], first designed and implemented by [[Mathematician#CARHoare|C.A.R. Hoare]] on an [https://en.wikipedia.org/wiki/Elliott_803 Elliott 503].  
 
All [https://en.wikipedia.org/wiki/System_software system software], such as [https://en.wikipedia.org/wiki/Burroughs_MCP Burroughs MCP], was written in an extended variety of ALGOL 60, [https://en.wikipedia.org/wiki/Executive_Systems_Problem_Oriented_Language ESPOL].  
 
All [https://en.wikipedia.org/wiki/System_software system software], such as [https://en.wikipedia.org/wiki/Burroughs_MCP Burroughs MCP], was written in an extended variety of ALGOL 60, [https://en.wikipedia.org/wiki/Executive_Systems_Problem_Oriented_Language ESPOL].  

Latest revision as of 22:53, 28 February 2020

Home * Hardware * Burroughs B-5500

Burroughs B5500 Installation [1]

Burroughs B-5500, (B5000, B5500, B7800)
the second member of Burroughs large systems in 1964, with a 3 times speed improvement of the initial B-5000 of 1961 which was designed by chief architect Robert S. Barton, a unique machine using discrete transistor logic and magnetic core memory, well ahead of its time. The B-5000 family were 48-bit stack machines with multitasking facilities, all code automatically reentrant. They used a partially data-driven tagged and descriptor-based design, supporting exclusively high-level programming languages. The ALGOL 60 dialect chosen for the B-5000 was Elliott ALGOL, first designed and implemented by C.A.R. Hoare on an Elliott 503. All system software, such as Burroughs MCP, was written in an extended variety of ALGOL 60, ESPOL. The successor machines followed the hardware development trends to re-implement the architectures in new logic over the next 25 years, with the B5500, B6500, B-5700, B6700, B7700, B6800, B7800, and finally the Burroughs A series [2].

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