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'''Bruce W. Leverett''',<br/> | '''Bruce W. Leverett''',<br/> | ||
an American [[FIDE]] [https://en.wikipedia.org/wiki/FIDE_titles#FIDE_Master_.28FM.29 master of chess] <ref>[http://ratings.fide.com/card.phtml?event=2002906 Leverett, Bruce W FIDE Chess Profile]</ref>, computer scientist, and software engineer at [https://en.wikipedia.org/wiki/Panasas Panasas], a provider storage solutions. He received a Ph.D. in computer science from [[Carnegie Mellon University]] in 1981 on [https://en.wikipedia.org/wiki/Register_allocation register allocation in optimizing compilers] <ref>[[Bruce W. Leverett]] ('''1981'''). ''Register allocation in optimizing compilers''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#WiWulf|William A. Wulf]]</ref>. His research interests in academics and industry, beside [[Optimization|compiler optimization]] and [https://en.wikipedia.org/wiki/Code_generation_%28compiler%29 code generation], include [https://en.wikipedia.org/wiki/Memory_management memory management] and [https://en.wikipedia.org/wiki/File_system file systems], where he contributed to the [https://en.wikipedia.org/wiki/POSIX POSIX] compliant [https://en.wikipedia.org/wiki/Episode_filesystem Episode filesystem] <ref>[https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/s/Sidebotham:Robert_N=.html Robert N. Sidebotham] ('''1992'''). ''The Episode File System''. [https://en.wikipedia.org/wiki/Transarc Transarc], [http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.6439 CiteSeerX]</ref>. | an American [[FIDE]] [https://en.wikipedia.org/wiki/FIDE_titles#FIDE_Master_.28FM.29 master of chess] <ref>[http://ratings.fide.com/card.phtml?event=2002906 Leverett, Bruce W FIDE Chess Profile]</ref>, computer scientist, and software engineer at [https://en.wikipedia.org/wiki/Panasas Panasas], a provider storage solutions. He received a Ph.D. in computer science from [[Carnegie Mellon University]] in 1981 on [https://en.wikipedia.org/wiki/Register_allocation register allocation in optimizing compilers] <ref>[[Bruce W. Leverett]] ('''1981'''). ''Register allocation in optimizing compilers''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#WiWulf|William A. Wulf]]</ref>. His research interests in academics and industry, beside [[Optimization|compiler optimization]] and [https://en.wikipedia.org/wiki/Code_generation_%28compiler%29 code generation], include [https://en.wikipedia.org/wiki/Memory_management memory management] and [https://en.wikipedia.org/wiki/File_system file systems], where he contributed to the [https://en.wikipedia.org/wiki/POSIX POSIX] compliant [https://en.wikipedia.org/wiki/Episode_filesystem Episode filesystem] <ref>[https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/s/Sidebotham:Robert_N=.html Robert N. Sidebotham] ('''1992'''). ''The Episode File System''. [https://en.wikipedia.org/wiki/Transarc Transarc], [http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.6439 CiteSeerX]</ref>. | ||
| − | As undergraduate at [[Harvard University]] in the early 70s, he wrote the chess program [[Leverett CP]] which participated the [[ACM 1972]]. | + | As undergraduate at [[Harvard University]] in the early 70s, he wrote the chess program [[Leverett CP]] which participated the [[ACM 1972]]. |
=Selected Publications= | =Selected Publications= | ||
Revision as of 11:35, 13 June 2019
Home * People * Bruce W. Leverett
Bruce W. Leverett [1]
Bruce W. Leverett,
an American FIDE master of chess [2], computer scientist, and software engineer at Panasas, a provider storage solutions. He received a Ph.D. in computer science from Carnegie Mellon University in 1981 on register allocation in optimizing compilers [3]. His research interests in academics and industry, beside compiler optimization and code generation, include memory management and file systems, where he contributed to the POSIX compliant Episode filesystem [4].
As undergraduate at Harvard University in the early 70s, he wrote the chess program Leverett CP which participated the ACM 1972.
Contents
Selected Publications
1977 ...
- Bruce W. Leverett, Paul J. Knueven, Peter G. Hibbard (1977). Portability Techniques for BLISS Programs. Carnegie Mellon University [6]
- Rick Cattell, Joseph M. Newcomer, Bruce W. Leverett (1979). Code generation in a machine-independent compiler. ACM SIGPLAN Symposium on Compiler Construction 1979
1980 ...
- Bruce W. Leverett, Thomas G. Szymanski (1980). Chaining Span-Dependent Jump Instructions. ACM Transactions on Programming Languages and Systems, Vol 2. No. 3
- Bruce W. Leverett (1981). Register allocation in optimizing compilers. Ph.D. thesis, Carnegie Mellon University, advisor William A. Wulf
- Bruce W. Leverett, Peter G. Hibbard (1982). An Adaptive System for Dynamic Storage Allocation. Software: Practice and Experience, Vol. 12, No. 6
- Bruce W. Leverett (1982). Topics in Code Generation and Register Allocation. Carnegie Mellon University
- Bruce W. Leverett (1983). Register allocation in optimizing compilers. UMI Research Press
1990 ...
- Michael L. Kazar, Bruce W. Leverett, Owen T. Anderson, Vasilis Apostolides, Beth A. Bottos, Sailesh Chutani, Craig F. Everhart, W. Anthony Mason, Shu-Tsui Tu, Edward R. Zayas (1990). DEcorum File System Architectural Overview. USENIX Summer 1990
- Sailesh Chutani, Owen T. Anderson, Michael L. Kazar, Bruce W. Leverett, W. Anthony Mason, Robert N. Sidebotham (1992). The Episode File System. Transarc, CiteSeerX
External Links
- Bruce Leverett's Home Page
- The Mathematics Genealogy Project - Bruce Leverett
- Bruce Leverett | LinkedIn
- Technique for accelerating the creation of a point in time prepresentation of a virtual file system - Google Patents
- Technique for accelerating file deletion by preloading indirect blocks - Google Patents
- Technique for accelerating log replay with partial cache flush - Google Patents
- Leverett, Bruce W FIDE Chess Profile
- The chess games of Bruce W. Leverett from chessgames.com
- Bruce W Leverett chess games - 365Chess.com
References
- ↑ Bruce Leverett | LinkedIn
- ↑ Leverett, Bruce W FIDE Chess Profile
- ↑ Bruce W. Leverett (1981). Register allocation in optimizing compilers. Ph.D. thesis, Carnegie Mellon University, advisor William A. Wulf
- ↑ Sailesh Chutani, Owen T. Anderson, Michael L. Kazar, Bruce W. Leverett, W. Anthony Mason, Robert N. Sidebotham (1992). The Episode File System. Transarc, CiteSeerX
- ↑ dblp: Bruce W. Leverett
- ↑ BLISS from Wikipedia
