25,161
edits
Changes
Created page with "'''Home * People * Bruce W. Leverett''' FILE:BruceWLeverett.jpg|border|right|thumb|link=https://www.linkedin.com/in/bruce-leverett-8704a834/| Bruce W. Lev..."
'''[[Main Page|Home]] * [[People]] * Bruce W. Leverett'''
[[FILE:BruceWLeverett.jpg|border|right|thumb|link=https://www.linkedin.com/in/bruce-leverett-8704a834/| Bruce W. Leverett <ref>[https://www.linkedin.com/in/bruce-leverett-8704a834/ Bruce Leverett | LinkedIn]</ref> ]]
'''Bruce W. Leverett''',<br/>
an American [[FIDE]] [https://en.wikipedia.org/wiki/FIDE_titles#FIDE_Master_.28FM.29 master of chess] <ref>[http://ratings.fide.com/card.phtml?event=2002906 Leverett, Bruce W FIDE Chess Profile]</ref>, computer scientist, and software engineer at [https://en.wikipedia.org/wiki/Panasas Panasas], a provider storage solutions. He received a Ph.D. in computer science from [[Carnegie Mellon University]] in 1981 on [https://en.wikipedia.org/wiki/Register_allocation register allocation in optimizing compilers] <ref>[[Bruce W. Leverett]] ('''1981'''). ''Register allocation in optimizing compilers''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#WiWulf|William A. Wulf]]</ref>. His research interests in academics and industry, beside [[Optimization|compiler optimization]] and [https://en.wikipedia.org/wiki/Code_generation_%28compiler%29 code generation], include [https://en.wikipedia.org/wiki/Memory_management memory management] and [https://en.wikipedia.org/wiki/File_system file systems], where he contributed to the [https://en.wikipedia.org/wiki/POSIX POSIX] compliant [https://en.wikipedia.org/wiki/Episode_filesystem Episode filesystem] <ref>[https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/s/Sidebotham:Robert_N=.html Robert N. Sidebotham] ('''1992'''). ''The Episode File System''. [https://en.wikipedia.org/wiki/Transarc Transarc], [http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.6439 CiteSeerX]</ref>.
As undergraduate at [[Harvard University]] in the early 70s, he wrote the chess program [[Leverett CP]] which participated the [[ACM 1972]]. Labeled by tournament director [[David Levy]] as "the joke of the tournament", Leverett attributed the tie for the last place to "poor programming" <ref>[https://www.thecrimson.com/article/1972/8/22/computers-compete-in-sheraton-chess-match/ Computers Compete in Sheraton Chess Match] by [https://www.thecrimson.com/writer/1200913/Peter__Koretsky/ Peter Koretsky], [https://en.wikipedia.org/wiki/The_Harvard_Crimson The Harvard Crimson], August 22, 1972</ref>.
=Selected Publications=
<ref>[https://dblp.uni-trier.de/pers/hd/l/Leverett:Bruce_W=.html dblp: Bruce W. Leverett]</ref>
==1977 ...==
* [[Bruce W. Leverett]], [http://www.patentbuddy.com/Inventor/Knueven-Paul-J/3973220 Paul J. Knueven], [https://genealogy.math.ndsu.nodak.edu/id.php?id=95738 Peter G. Hibbard] ('''1977'''). ''[https://www.semanticscholar.org/paper/Portability-techniques-for-BLISS-programs-Leverett-Knueven/16983da88a8eb30b4a4e16801b0fdde3f49c03cf Portability Techniques for BLISS Programs]''. [[Carnegie Mellon University]] <ref>[https://en.wikipedia.org/wiki/BLISS BLISS from Wikipedia]</ref>
* [https://dblp.uni-trier.de/pers/hd/c/Cattell:R=_G=_G= Rick Cattell], [https://dblp.uni-trier.de/pers/hd/n/Newcomer:Joseph_M= Joseph M. Newcomer], [[Bruce W. Leverett]] ('''1979'''). ''[https://dl.acm.org/citation.cfm?id=989395 Code generation in a machine-independent compiler]''. [[ACM#SIGPLAN|ACM SIGPLAN]] Symposium on Compiler Construction 1979
==1980 ...==
* [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/s/Szymanski:Thomas_G= Thomas G. Szymanski] ('''1980'''). ''Chaining Span-Dependent Jump Instructions''. [[ACM#TOPLAS|ACM Transactions on Programming Languages and Systems]], Vol 2. No. 3
* [[Bruce W. Leverett]] ('''1981'''). ''Register allocation in optimizing compilers''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#WiWulf|William A. Wulf]]
* [[Bruce W. Leverett]], [https://genealogy.math.ndsu.nodak.edu/id.php?id=95738 Peter G. Hibbard] ('''1982'''). ''[https://onlinelibrary.wiley.com/doi/10.1002/spe.4380120606 An Adaptive System for Dynamic Storage Allocation]''. [https://dblp.uni-trier.de/db/journals/spe/spe12.html Software: Practice and Experience], [https://onlinelibrary.wiley.com/toc/1097024x/12/6 Vol. 12, No. 6]
* [[Bruce W. Leverett]] ('''1982'''). ''[https://www.semanticscholar.org/paper/Topics-in-Code-Generation-and-Register-Allocation-Leverett/642c619c2f8668ea4f045b4bc88c375543a3935c Topics in Code Generation and Register Allocation]''. [[Carnegie Mellon University]]
* [[Bruce W. Leverett]] ('''1983'''). ''[https://dl.acm.org/citation.cfm?id=185 Register allocation in optimizing compilers]''. [https://en.wikipedia.org/wiki/University_of_Michigan_Press UMI Research Press]
==1990 ...==
* [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://dblp.uni-trier.de/pers/hd/a/Apostolides:Vasilis.html Vasilis Apostolides], [https://dblp.uni-trier.de/pers/hd/b/Bottos:Beth_A=.html Beth A. Bottos], [https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/e/Everhart:Craig.html Craig F. Everhart], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/t/Tu:Shu=Tsui.html Shu-Tsui Tu], [https://dblp.uni-trier.de/pers/hd/z/Zayas:Edward_R=.html Edward R. Zayas] ('''1990'''). ''DEcorum File System Architectural Overview''. [https://dblp.uni-trier.de/db/conf/usenix/usenix_su90.html USENIX Summer 1990]
* [https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/s/Sidebotham:Robert_N=.html Robert N. Sidebotham] ('''1992'''). ''The Episode File System''. [https://en.wikipedia.org/wiki/Transarc Transarc], [http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.6439 CiteSeerX]
=External Links=
* [http://www.cs.cmu.edu/%7Ebwl/ Bruce Leverett's Home Page]
* [https://genealogy.math.ndsu.nodak.edu/id.php?id=50108 The Mathematics Genealogy Project - Bruce Leverett]
* [https://www.linkedin.com/in/bruce-leverett-8704a834/ Bruce Leverett | LinkedIn]
* [https://patents.google.com/patent/US7424497 Technique for accelerating the creation of a point in time prepresentation of a virtual file system - Google Patents]
* [https://patents.google.com/patent/US7509329 Technique for accelerating file deletion by preloading indirect blocks - Google Patents]
* [https://patents.google.com/patent/US7519628 Technique for accelerating log replay with partial cache flush - Google Patents]
* [http://ratings.fide.com/card.phtml?event=2002906 Leverett, Bruce W FIDE Chess Profile]
* [http://www.chessgames.com/perl/chessplayer?pid=28434 The chess games of Bruce W. Leverett] from [http://www.chessgames.com/index.html chessgames.com]
* [http://www.365chess.com/players/Bruce_W_Leverett Bruce W Leverett chess games - 365Chess.com]
=References=
<references />
'''[[People|Up one level]]'''
[[Category:Researcher|Leverett]]
[[Category:Chess Player|Leverett]]
[[Category:Chess Programmer|Leverett]]
[[FILE:BruceWLeverett.jpg|border|right|thumb|link=https://www.linkedin.com/in/bruce-leverett-8704a834/| Bruce W. Leverett <ref>[https://www.linkedin.com/in/bruce-leverett-8704a834/ Bruce Leverett | LinkedIn]</ref> ]]
'''Bruce W. Leverett''',<br/>
an American [[FIDE]] [https://en.wikipedia.org/wiki/FIDE_titles#FIDE_Master_.28FM.29 master of chess] <ref>[http://ratings.fide.com/card.phtml?event=2002906 Leverett, Bruce W FIDE Chess Profile]</ref>, computer scientist, and software engineer at [https://en.wikipedia.org/wiki/Panasas Panasas], a provider storage solutions. He received a Ph.D. in computer science from [[Carnegie Mellon University]] in 1981 on [https://en.wikipedia.org/wiki/Register_allocation register allocation in optimizing compilers] <ref>[[Bruce W. Leverett]] ('''1981'''). ''Register allocation in optimizing compilers''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#WiWulf|William A. Wulf]]</ref>. His research interests in academics and industry, beside [[Optimization|compiler optimization]] and [https://en.wikipedia.org/wiki/Code_generation_%28compiler%29 code generation], include [https://en.wikipedia.org/wiki/Memory_management memory management] and [https://en.wikipedia.org/wiki/File_system file systems], where he contributed to the [https://en.wikipedia.org/wiki/POSIX POSIX] compliant [https://en.wikipedia.org/wiki/Episode_filesystem Episode filesystem] <ref>[https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/s/Sidebotham:Robert_N=.html Robert N. Sidebotham] ('''1992'''). ''The Episode File System''. [https://en.wikipedia.org/wiki/Transarc Transarc], [http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.6439 CiteSeerX]</ref>.
As undergraduate at [[Harvard University]] in the early 70s, he wrote the chess program [[Leverett CP]] which participated the [[ACM 1972]]. Labeled by tournament director [[David Levy]] as "the joke of the tournament", Leverett attributed the tie for the last place to "poor programming" <ref>[https://www.thecrimson.com/article/1972/8/22/computers-compete-in-sheraton-chess-match/ Computers Compete in Sheraton Chess Match] by [https://www.thecrimson.com/writer/1200913/Peter__Koretsky/ Peter Koretsky], [https://en.wikipedia.org/wiki/The_Harvard_Crimson The Harvard Crimson], August 22, 1972</ref>.
=Selected Publications=
<ref>[https://dblp.uni-trier.de/pers/hd/l/Leverett:Bruce_W=.html dblp: Bruce W. Leverett]</ref>
==1977 ...==
* [[Bruce W. Leverett]], [http://www.patentbuddy.com/Inventor/Knueven-Paul-J/3973220 Paul J. Knueven], [https://genealogy.math.ndsu.nodak.edu/id.php?id=95738 Peter G. Hibbard] ('''1977'''). ''[https://www.semanticscholar.org/paper/Portability-techniques-for-BLISS-programs-Leverett-Knueven/16983da88a8eb30b4a4e16801b0fdde3f49c03cf Portability Techniques for BLISS Programs]''. [[Carnegie Mellon University]] <ref>[https://en.wikipedia.org/wiki/BLISS BLISS from Wikipedia]</ref>
* [https://dblp.uni-trier.de/pers/hd/c/Cattell:R=_G=_G= Rick Cattell], [https://dblp.uni-trier.de/pers/hd/n/Newcomer:Joseph_M= Joseph M. Newcomer], [[Bruce W. Leverett]] ('''1979'''). ''[https://dl.acm.org/citation.cfm?id=989395 Code generation in a machine-independent compiler]''. [[ACM#SIGPLAN|ACM SIGPLAN]] Symposium on Compiler Construction 1979
==1980 ...==
* [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/s/Szymanski:Thomas_G= Thomas G. Szymanski] ('''1980'''). ''Chaining Span-Dependent Jump Instructions''. [[ACM#TOPLAS|ACM Transactions on Programming Languages and Systems]], Vol 2. No. 3
* [[Bruce W. Leverett]] ('''1981'''). ''Register allocation in optimizing compilers''. Ph.D. thesis, [[Carnegie Mellon University]], advisor [[Mathematician#WiWulf|William A. Wulf]]
* [[Bruce W. Leverett]], [https://genealogy.math.ndsu.nodak.edu/id.php?id=95738 Peter G. Hibbard] ('''1982'''). ''[https://onlinelibrary.wiley.com/doi/10.1002/spe.4380120606 An Adaptive System for Dynamic Storage Allocation]''. [https://dblp.uni-trier.de/db/journals/spe/spe12.html Software: Practice and Experience], [https://onlinelibrary.wiley.com/toc/1097024x/12/6 Vol. 12, No. 6]
* [[Bruce W. Leverett]] ('''1982'''). ''[https://www.semanticscholar.org/paper/Topics-in-Code-Generation-and-Register-Allocation-Leverett/642c619c2f8668ea4f045b4bc88c375543a3935c Topics in Code Generation and Register Allocation]''. [[Carnegie Mellon University]]
* [[Bruce W. Leverett]] ('''1983'''). ''[https://dl.acm.org/citation.cfm?id=185 Register allocation in optimizing compilers]''. [https://en.wikipedia.org/wiki/University_of_Michigan_Press UMI Research Press]
==1990 ...==
* [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://dblp.uni-trier.de/pers/hd/a/Apostolides:Vasilis.html Vasilis Apostolides], [https://dblp.uni-trier.de/pers/hd/b/Bottos:Beth_A=.html Beth A. Bottos], [https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/e/Everhart:Craig.html Craig F. Everhart], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/t/Tu:Shu=Tsui.html Shu-Tsui Tu], [https://dblp.uni-trier.de/pers/hd/z/Zayas:Edward_R=.html Edward R. Zayas] ('''1990'''). ''DEcorum File System Architectural Overview''. [https://dblp.uni-trier.de/db/conf/usenix/usenix_su90.html USENIX Summer 1990]
* [https://dblp.uni-trier.de/pers/hd/c/Chutani:Sailesh.html Sailesh Chutani], [https://dblp.uni-trier.de/pers/hd/a/Anderson:Owen_T=.html Owen T. Anderson], [https://en.wikipedia.org/wiki/Michael_L._Kazar Michael L. Kazar], [[Bruce W. Leverett]], [https://dblp.uni-trier.de/pers/hd/m/Mason:W=_Anthony.html W. Anthony Mason], [https://dblp.uni-trier.de/pers/hd/s/Sidebotham:Robert_N=.html Robert N. Sidebotham] ('''1992'''). ''The Episode File System''. [https://en.wikipedia.org/wiki/Transarc Transarc], [http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.6439 CiteSeerX]
=External Links=
* [http://www.cs.cmu.edu/%7Ebwl/ Bruce Leverett's Home Page]
* [https://genealogy.math.ndsu.nodak.edu/id.php?id=50108 The Mathematics Genealogy Project - Bruce Leverett]
* [https://www.linkedin.com/in/bruce-leverett-8704a834/ Bruce Leverett | LinkedIn]
* [https://patents.google.com/patent/US7424497 Technique for accelerating the creation of a point in time prepresentation of a virtual file system - Google Patents]
* [https://patents.google.com/patent/US7509329 Technique for accelerating file deletion by preloading indirect blocks - Google Patents]
* [https://patents.google.com/patent/US7519628 Technique for accelerating log replay with partial cache flush - Google Patents]
* [http://ratings.fide.com/card.phtml?event=2002906 Leverett, Bruce W FIDE Chess Profile]
* [http://www.chessgames.com/perl/chessplayer?pid=28434 The chess games of Bruce W. Leverett] from [http://www.chessgames.com/index.html chessgames.com]
* [http://www.365chess.com/players/Bruce_W_Leverett Bruce W Leverett chess games - 365Chess.com]
=References=
<references />
'''[[People|Up one level]]'''
[[Category:Researcher|Leverett]]
[[Category:Chess Player|Leverett]]
[[Category:Chess Programmer|Leverett]]
