BMI2

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BMI2,
an x86-64 expansion of bit-manipulation instructions by Intel. Like BMI1, BMI2 employs VEX prefix encoding to support three-operand syntax with non-destructive source operands on 32- or 64-bit general-purpose registers. Along with AVX2, BMI2 was expected to be part of Intel's Haswell architecture planned for 2013, but was not yet available in one of the first tested Haswell generations of mid 2013 as reported by Andreas Stiller from the German c't magazine [1]. BMI2 requires bit 8 set in EBX of CPUID with EAX=07H, ECX=0H [2]. In 2017, BMI2 was further incorporated in AMD's Zen-architecture but so far with a slow implementation of critical instructions such as PDEP and PEXT [3] [4] .

Instructions

Beside the instructions explained in more detail below, there is MULX, Unsigned Multiply, and RORX, SARX/SHLX/SHRX, that is rotate and shifts without affecting processor flags. PEXT and PDEP [5] allow for an alternative of kindergarten- or magic bitboards, and clearly makes maintaining rotated bitboards obsolete [6].

BZHI

Zero High Bits Starting with Specified Bit Position.

dest ::= src & ((1 << index)-1);

unsigned __int64 _bzhi_u64(unsigned __int64 src, unsigned __int32 index);

PDEP

Parallel Bits Deposit. May be used to map first rank attacks to any rank, file, or diagonal on the chess board.

Intrinsic Prototype

unsigned __int64 pdep_u64(unsigned __int64 src, unsigned __int64 mask);

Sample

SRC1   ┌───┬───┬───┬───┬───┐    ┌───┬───┬───┬───┬───┬───┬───┬───┐
       │S63│S62│S61│S60│S59│....│ S7│ S6│ S5│ S4│ S3│ S2│ S1│ S0│ 
       └───┴───┴───┴───┴───┘    └───┴───┴───┴───┴───┴───┴───┴───┘

SRC2   ┌───┬───┬───┬───┬───┐    ┌───┬───┬───┬───┬───┬───┬───┬───┐
(mask) │ 0 │ 0 │ 0 │ 1 │ 0 │0...│ 1 │ 0 │ 1 │ 0 │ 0 │ 1 │ 0 │ 0 │  (f.i. 4 bits set)
       └───┴───┴───┴───┴───┘    └───┴───┴───┴───┴───┴───┴───┴───┘

DEST   ┌───┬───┬───┬───┬───┐    ┌───┬───┬───┬───┬───┬───┬───┬───┐
       │ 0 │ 0 │ 0 │ S3│ 0 │0...│ S2│ 0 │ S1│ 0 │ 0 │ S0│ 0 │ 0 │ 
       └───┴───┴───┴───┴───┘    └───┴───┴───┴───┴───┴───┴───┴───┘

Serial Implementation

in C [7]:

U64 _pdep_u64(U64 val, U64 mask) {
  U64 res = 0;
  for (U64 bb = 1; mask; bb += bb) {
    if (val & bb)
      res |= mask & -mask;
    mask &= mask - 1;
  }
  return res;
}

PEXT

Parallel Bits Extract. Great to get the inner six bit occupancy of any rank, file, or diagonal as index of six consecutive lower bit, or the up to 12 bits for a magic attack lookup.

Intrinsic Prototype

unsigned __int64 _pext_u64(unsigned __int64 src, unsigned __int64 mask);

Sample

SRC1   ┌───┬───┬───┬───┬───┐    ┌───┬───┬───┬───┬───┬───┬───┬───┐
       │S63│S62│S61│S60│S59│....│ S7│ S6│ S5│ S4│ S3│ S2│ S1│ S0│ 
       └───┴───┴───┴───┴───┘    └───┴───┴───┴───┴───┴───┴───┴───┘

SRC2   ┌───┬───┬───┬───┬───┐    ┌───┬───┬───┬───┬───┬───┬───┬───┐
(mask) │ 0 │ 0 │ 0 │ 1 │ 0 │0...│ 1 │ 0 │ 1 │ 0 │ 0 │ 1 │ 0 │ 0 │  (f.i. 4 bits set)
       └───┴───┴───┴───┴───┘    └───┴───┴───┴───┴───┴───┴───┴───┘

DEST   ┌───┬───┬───┬───┬───┐    ┌───┬───┬───┬───┬───┬───┬───┬───┐
       │ 0 │ 0 │ 0 │ 0 │ 0 │0...│ 0 │ 0 │ 0 │ 0 │S60│ S7│ S5│ S2│ 
       └───┴───┴───┴───┴───┘    └───┴───┴───┴───┴───┴───┴───┴───┘

Serial Implementation

in C [8], quite similar to PDEP in traversing the mask, and only two expressions, "mask & -mask" and "bb" swapped:

U64 _pext_u64(U64 val, U64 mask) {
  U64 res = 0;
  for (U64 bb = 1; mask; bb += bb) {
    if ( val & mask & -mask )
      res |= bb;
    mask &= mask - 1;
  }
  return res;
} 

Applications

PEXT Bitboards

Fancy PEXT Bitboards as replacement for Fancy Magic Bitboards. The relevant up to four ray occupancies are mapped to a dense index range by using the PEXT instruction:

U64 arrAttacks  [...]; // ~840 KByte all rook and bishop attacks
U64 arrRookMask  [64]; // 10..12 relevant occupancy bits per rook square
U64 arrBishopMask[64]; //  5.. 9 relevant occupancy bits per bishop square
U32 arrRookBase  [64]; // arrAttacks base offset per rook square
U32 arrBishopBase[64]; // arrAttacks base offset per bishop square

U64 rookAttack(U64 occ, enumSquare sq) {
  return arrAttacks[arrRookBase[sq] + _pext_u64(occ, arrRookMask[sq])];
}

U64 bishopAttack(U64 occ, enumSquare sq) {
  return arrAttacks[arrBishopBase[sq] + _pext_u64(occ, arrBishopMask[sq])];
}

PEXT/PDEP Bitboards

An idea for denser sliding attack tables is also using PDEP, dividing the table size of the PEXT Bitboards by four but some trailing computation. Looking up 16-bit words instead of bitboards - to get the scattered bits of the up to four ray attacks per square in an extracted form mapped to a 16-bit word, which then becomes the attack bitboard by performing a deposit instruction with an appropriate second mask per square. The technique was introduced by Zach Wegner in CCC [9] [10] and implemented by Ronald de Man with a table of slightly more than 210 KiB [11] [12]. Ronald's code was tested by Jean-Francois Romang using Stockfish as testbed, giving promising results [13] [14].

Syzygy Generator

Ronald de Man's generator for Syzygy Bases can take profit of PDEP and PEXT instructions, or to use their serial implementations to further reduce the size of his already compact endgame tablebases [15].

See also

Forum Posts

2011 ...

2015 ...

External Links

References

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