SAM

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SAM, (SAM47, Samsung Arrangeable Microcontrollers) a family of Samsung 4-bit microcontroller (MCU) with the eponymous CPU core. The single-chip controller of the S3C7xxx, KS56C2x and KS57C2x series provide various amounts of ROM and nibble or byte addressable RAM, parallel and serial I/O, 8-bit timer/counter, interrupt controller, and LCD direct drive capability. Samsung provides development tools, such as the Samsung Arrangeable Microcontroller (SAM) Assembler.

=Architecture= RAM is organized in three banks, 0, 1 and 15 of 256 nibbles each. The lowest 32 nibbles of bank 0 (000H–01FH) are used as working registers, the remaining 224 nibbles can be used both as stack area and as general-purpose data memory, bank 1 for general-purpose use and bank 15 for memory-mapped I/O. There are multiple addressing modes, a 8-bit mode requires a even nibble address inside a pair of 4-bit registers. The register area is divided into four register banks 0 to 3 selected by the register bank selection instruction (SRB n), bank 0 for the main program, 1-3 for interrupt routines. Each of the register banks is subdivided into eight 4-bit registers A (lsn), E, L, H, X, W, Z, Y (msn) with EA, HL, WX, YZ as possible register pairs, as well as the cross mapped WL. With appropriate instructions, registers can be manipulated as 1-bit units, 4-bit units or, using paired registers, as 8-bit units, the latter also used as pointer for indirect addressing. Further the CPU has the obligatory 13- or 14-bit program counter and 8-bit stack pointer, a 16-bit sequential carrier (BSC) register, and status word.

=Chess Programs=
 * Category:SAM

=Manuals=
 * Samsung KS57C2308 Manuals | ManualsLib
 * Samsung S3C9228/P9228 User Manual | Manualsbrain.com
 * KS57C2316Q-XX Datasheet PDF Viewer

=External Links=
 * KS56C220 - Schachcomputer.info Wiki

=References= Up one Level