ARM6

Home * Hardware * ARM6



ARM6, (ARM610, ARM7) a family of 32-bit RISC processors of the ARMv3 architecture released in early 1992 by Advanced RISC Machines Ltd, a company structured as a joint venture between Acorn Computers Ltd, Apple and VLSI Technology, which became ARM Ltd when its parent company, ARM Holdings, floated on the London Stock Exchange and NASDAQ in 1998. The ARM6 is instruction compatible to Acorn's ARM2, has a full 32-bit address bus, requiring an extra PSR register. The differences between ARM6 and the later ARM7 are that the latter has a hardware debug capability, the Thumb instruction set to support both 16-bit and 32-bit instruction formats and an enhanced multiplier.

=Computer Chess= The ARM6 and successors were used in various dedicated chess computers, notably the RISC 2500, Mephisto Montreux, TASC R30 and TASC R40.

=See also=
 * ARM2
 * ARM11

=Manuals=
 * ARM® and Thumb®-2 Instruction Set Quick Reference Card (pdf)
 * ARM Assembly Language Programming by Pete Cockerell

=Publications=
 * Anthony Fox (2003). Formal Specification and Verification of ARM6. LNCS, Vol. 2758, Theorem Proving in Higher Order Logics, Springer
 * Michael J. C. Gordon (2004). Formal Specification and Verification of ARM6. Computer Laboratory, University of Cambridge, Final Report as pdf

=External Links=
 * Advanced RISC Machines Ltd. — ARM6 - Wikipedia
 * ARMwiki
 * ARM Assembler
 * Instruction set quick finder
 * Differences Between ARM6 and Earlier ARM Processors (Wayback Machine)
 * ARM from Schachcomputer.info Wiki
 * RISC OS from Wikipedia
 * ARM Hardware Overview
 * ARM Information Center
 * Race to Embedded World Domination by Paul DeMone, Real World Tech, November 9, 2000
 * Formal Specification and Verification of ARM6, University of Cambridge

=References= Up one Level