From Chessprogramming wiki
Jump to: navigation, search

Home * Hardware * UNIVAC 1100

UNIVAC 1100/80 [1]

UNIVAC 1100, (UNIVersal Automatic Computer)
a series of solid-state [2] mainframe computer systems by Sperry UNIVAC (since 1986 Unisys), started with the UNIVAC 1107 in 1962, the multiprocessor capable UNIVAC 1108 introduced in 1964 using integrated circuits rather than thin film memory, the cheaper UNIVAC 1106 in 1969, the enhanced multiprocessing support UNIVAC 1110 in 1972, followed by the semiconductor memory series such as the 1100/10 in 1975 and the 1100/80 in 1979.


The UNIVAC 1100 series was a 36-bit machine using ones' complement integer arithmetic as well as single (1:8:27) and double precision (1:11:60) floating point arithmetic. 128 registers include 15 index registers (X1 ... X15), 16 accumulators (A0 ... A15), and 15 special function user registers (R1 .. R15), the last four index registers (X12 ... X15) and the first four accumulators (A0 ... A3) overlap. All instructions were one 36-bit word long. Early machines had core memory and plated wire memory, until that was replaced with semiconductor memory in 1975.


CHAOS Team circa 1972.gif

The CHAOS Team circa 1972 with UNIVAC 1108 Computer in Cinnaminson, NJ
From left, Fred Swartz (rear), Vic Berman (front), Bill Toikka, Ira Ruben (seated), Joe Winograd [3]

Chess Programs

See also


External Links

UNIVAC 1100 Series Instruction Set


  1. The Sperry UNIVAC 1100/80 Computer Photo by Erick M. Griffin, Albany State University, 1981, Wikimedia Commons, UNIVAC 1100/2200 series from Wikipedia
  2. not considering the vacuum tube based machines with model numbers from 1101 to 1105 with different architectures and word sizes
  3. Photo courtesy Joe Winograd

Up one Level